Oops, please also add a reference to the main thread:
On Fri, Jun 28, 2019 at 3:23 PM Daniel Drake wrote:
> Detect modern setups where we have no need for the PIT (e.g. where
> we already know the TSC and LAPIC timer frequencies, so no need
> to calibrate them against the PIT), and skip
From: Thomas Gleixner
Recent Intel chipsets including Skylake and ApolloLake have
a special ITSSPRC register which allows the 8254 PIT to be gated.
When gated, the 8254 registers can still be programmed as normal, but
there are no IRQ0 timer interrupts.
Some products such as the Connex L1430
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