On Tue, Sep 09, 2014 at 10:01:18AM +0200, Clemens Ladisch wrote:
> Subhransu S. Prusty wrote:
> > This is needed because the hardware
>
> Which hardware? Every x86-64 CPU ever built by AMD, Intel, and VIA?
Baytrail and few other SoCs
>
> > does not support 64-bit moveq insructions while writing
On Tue, Sep 09, 2014 at 10:01:18AM +0200, Clemens Ladisch wrote:
Subhransu S. Prusty wrote:
This is needed because the hardware
Which hardware? Every x86-64 CPU ever built by AMD, Intel, and VIA?
Baytrail and few other SoCs
does not support 64-bit moveq insructions while writing to PCI
Subhransu S. Prusty wrote:
> This is needed because the hardware
Which hardware? Every x86-64 CPU ever built by AMD, Intel, and VIA?
> does not support 64-bit moveq insructions while writing to PCI MMIO.
> +#ifndef CONFIG_X86_64
> +#define MEMCPY_TOIO memcpy_toio
> +#else
> +#define
Subhransu S. Prusty wrote:
This is needed because the hardware
Which hardware? Every x86-64 CPU ever built by AMD, Intel, and VIA?
does not support 64-bit moveq insructions while writing to PCI MMIO.
+#ifndef CONFIG_X86_64
+#define MEMCPY_TOIO memcpy_toio
+#else
+#define MEMCPY_TOIO
This is needed because the hardware does not support 64-bit moveq
insructions while writing to PCI MMIO.
Signed-off-by: Subhransu S. Prusty
Signed-off-by: Vinod Koul
---
arch/x86/include/asm/io.h | 22 ++
1 file changed, 22 insertions(+)
diff --git
This is needed because the hardware does not support 64-bit moveq
insructions while writing to PCI MMIO.
Signed-off-by: Subhransu S. Prusty subhransu.s.pru...@intel.com
Signed-off-by: Vinod Koul vinod.k...@intel.com
---
arch/x86/include/asm/io.h | 22 ++
1 file changed, 22
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