Hi Stephen,
On Tue, 2015-07-14 at 15:13 -0700, Stephen Boyd wrote:
> On 07/10, James Liao wrote:
> > On Wed, 2015-07-08 at 17:44 -0700, Stephen Boyd wrote:
> > > On 07/08/2015 01:37 AM, James Liao wrote:
> > > > MT8173 MMPLL frequency settings are different from common PLLs.
> > > > It needs
Hi Stephen,
On Tue, 2015-07-14 at 15:13 -0700, Stephen Boyd wrote:
On 07/10, James Liao wrote:
On Wed, 2015-07-08 at 17:44 -0700, Stephen Boyd wrote:
On 07/08/2015 01:37 AM, James Liao wrote:
MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post
On 07/10, James Liao wrote:
> Hi Stephen,
>
> On Wed, 2015-07-08 at 17:44 -0700, Stephen Boyd wrote:
> > On 07/08/2015 01:37 AM, James Liao wrote:
> > > MT8173 MMPLL frequency settings are different from common PLLs.
> > > It needs different post divider settings for some ranges of frequency.
> >
On 07/10, James Liao wrote:
Hi Stephen,
On Wed, 2015-07-08 at 17:44 -0700, Stephen Boyd wrote:
On 07/08/2015 01:37 AM, James Liao wrote:
MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post divider settings for some ranges of frequency.
This patch
Hi Stephen,
On Wed, 2015-07-08 at 17:44 -0700, Stephen Boyd wrote:
> On 07/08/2015 01:37 AM, James Liao wrote:
> > MT8173 MMPLL frequency settings are different from common PLLs.
> > It needs different post divider settings for some ranges of frequency.
> > This patch add support for MT8173 MMPLL
Hi Stephen,
On Wed, 2015-07-08 at 17:44 -0700, Stephen Boyd wrote:
On 07/08/2015 01:37 AM, James Liao wrote:
MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post divider settings for some ranges of frequency.
This patch add support for MT8173 MMPLL
On 07/08/2015 01:37 AM, James Liao wrote:
> MT8173 MMPLL frequency settings are different from common PLLs.
> It needs different post divider settings for some ranges of frequency.
> This patch add support for MT8173 MMPLL frequency setting, includes:
>
> 1. Add div-rate table for PLLs.
> 2.
Hi all,
The cover letter's title should be "[PATCH v2 0/2] ..."
changes since v1:
- Add a separated patch for mtk_pll_set_rate_regs().
- Use a structure array to describe a div_table.
- Limit max frequency to div_table[0].
- Minor changes such as static and comments.
Best regards,
James
On
MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post divider settings for some ranges of frequency.
This patch add support for MT8173 MMPLL frequency setting, includes:
1. Add div-rate table for PLLs.
2. Increase the max ost divider setting from 3 (/8) to 4
MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post divider settings for some ranges of frequency.
This patch add support for MT8173 MMPLL frequency setting, includes:
1. Add div-rate table for PLLs.
2. Increase the max ost divider setting from 3 (/8) to 4
Hi all,
The cover letter's title should be [PATCH v2 0/2] ...
changes since v1:
- Add a separated patch for mtk_pll_set_rate_regs().
- Use a structure array to describe a div_table.
- Limit max frequency to div_table[0].
- Minor changes such as static and comments.
Best regards,
James
On
On 07/08/2015 01:37 AM, James Liao wrote:
MT8173 MMPLL frequency settings are different from common PLLs.
It needs different post divider settings for some ranges of frequency.
This patch add support for MT8173 MMPLL frequency setting, includes:
1. Add div-rate table for PLLs.
2. Increase
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