On Mon, May 27, 2019 at 1:34 PM Andreas Schwab wrote:
>
> On Mai 24 2019, Yash Shah wrote:
>
> > Hi Andreas,
> >
> > On Thu, May 23, 2019 at 6:19 PM Andreas Schwab wrote:
> >>
> >> On Mai 23 2019, Yash Shah wrote:
> >>
> >> > On FU540, the management IP block is tightly coupled with the
On Mai 24 2019, Yash Shah wrote:
> Hi Andreas,
>
> On Thu, May 23, 2019 at 6:19 PM Andreas Schwab wrote:
>>
>> On Mai 23 2019, Yash Shah wrote:
>>
>> > On FU540, the management IP block is tightly coupled with the Cadence
>> > MACB IP block. It manages many of the boundary signals from the
On Thu, May 23, 2019 at 9:58 PM David Miller wrote:
>
>
> Please be consistent in your subsystem prefixes used in your Subject lines.
> You use "net: macb:" then "net/macb:" Really, plain "macb: " is sufficient.
Sure, Will take care of this in the next revision of this patch.
Thanks for your
Hi Andreas,
On Thu, May 23, 2019 at 6:19 PM Andreas Schwab wrote:
>
> On Mai 23 2019, Yash Shah wrote:
>
> > On FU540, the management IP block is tightly coupled with the Cadence
> > MACB IP block. It manages many of the boundary signals from the MACB IP
> > This patchset controls the tx_clk
Please be consistent in your subsystem prefixes used in your Subject lines.
You use "net: macb:" then "net/macb:" Really, plain "macb: " is sufficient.
Thank you.
On Mai 23 2019, Yash Shah wrote:
> On FU540, the management IP block is tightly coupled with the Cadence
> MACB IP block. It manages many of the boundary signals from the MACB IP
> This patchset controls the tx_clk input signal to the MACB IP. It
> switches between the local TX clock (125MHz)
On FU540, the management IP block is tightly coupled with the Cadence
MACB IP block. It manages many of the boundary signals from the MACB IP
This patchset controls the tx_clk input signal to the MACB IP. It
switches between the local TX clock (125MHz) and PHY TX clocks. This
is necessary to
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