On Fri, Jun 16, 2017 at 10:50 AM, Andi Kleen wrote:
>> > Yeah, I think it is easier and more portable, especially on hardware with a
>> > PEBS-like mechanism but no branch buffer (like LBR). FYI, I did do a test
>> > implementation yesterday to evaluate the difficulty.
>> >
On Fri, Jun 16, 2017 at 10:50 AM, Andi Kleen wrote:
>> > Yeah, I think it is easier and more portable, especially on hardware with a
>> > PEBS-like mechanism but no branch buffer (like LBR). FYI, I did do a test
>> > implementation yesterday to evaluate the difficulty.
>> >
>> A more generalized
> > Yeah, I think it is easier and more portable, especially on hardware with a
> > PEBS-like mechanism but no branch buffer (like LBR). FYI, I did do a test
> > implementation yesterday to evaluate the difficulty.
> >
> A more generalized usage of the feature is to evaluate the amount of skid
>
> > Yeah, I think it is easier and more portable, especially on hardware with a
> > PEBS-like mechanism but no branch buffer (like LBR). FYI, I did do a test
> > implementation yesterday to evaluate the difficulty.
> >
> A more generalized usage of the feature is to evaluate the amount of skid
>
On Fri, Jun 16, 2017 at 10:08 AM, Stephane Eranian wrote:
> On Fri, Jun 16, 2017 at 9:06 AM, Andi Kleen wrote:
>> On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
>>> Andi,
>>>
>>> On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen
On Fri, Jun 16, 2017 at 10:08 AM, Stephane Eranian wrote:
> On Fri, Jun 16, 2017 at 9:06 AM, Andi Kleen wrote:
>> On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
>>> Andi,
>>>
>>> On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
>>> >> Looking at this approach, the user
On Fri, Jun 16, 2017 at 9:06 AM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
>> Andi,
>>
>> On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
>> >> Looking at this approach, the user interface is
On Fri, Jun 16, 2017 at 9:06 AM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
>> Andi,
>>
>> On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
>> >> Looking at this approach, the user interface is straightforward,
>> >> implementation in the x86 code is
On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
> Andi,
>
> On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
> >> Looking at this approach, the user interface is straightforward,
> >> implementation in the x86 code is a bit more hairy because of the way
On Thu, Jun 15, 2017 at 11:52:07PM -0700, Stephane Eranian wrote:
> Andi,
>
> On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
> >> Looking at this approach, the user interface is straightforward,
> >> implementation in the x86 code is a bit more hairy because of the way
> >> the branch_stack
Andi,
On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
>> Looking at this approach, the user interface is straightforward,
>> implementation in the x86 code is a bit more hairy because of the way
>> the branch_stack is captured, via the cpuc->lbr_entries. If you assume
>>
Andi,
On Thu, Jun 15, 2017 at 4:18 PM, Andi Kleen wrote:
>> Looking at this approach, the user interface is straightforward,
>> implementation in the x86 code is a bit more hairy because of the way
>> the branch_stack is captured, via the cpuc->lbr_entries. If you assume
>> that SKID_IP cannot
> Looking at this approach, the user interface is straightforward,
> implementation in the x86 code is a bit more hairy because of the way
> the branch_stack is captured, via the cpuc->lbr_entries. If you assume
> that SKID_IP cannot be used with any other branch stack mode, then it
> is easy. It
> Looking at this approach, the user interface is straightforward,
> implementation in the x86 code is a bit more hairy because of the way
> the branch_stack is captured, via the cpuc->lbr_entries. If you assume
> that SKID_IP cannot be used with any other branch stack mode, then it
> is easy. It
On Thu, Jun 15, 2017 at 1:20 PM, Stephane Eranian wrote:
> On Thu, Jun 15, 2017 at 1:02 PM, Andi Kleen wrote:
>> On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
>>> On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen
On Thu, Jun 15, 2017 at 1:20 PM, Stephane Eranian wrote:
> On Thu, Jun 15, 2017 at 1:02 PM, Andi Kleen wrote:
>> On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
>>> On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
>>> > On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane
On Thu, Jun 15, 2017 at 1:02 PM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
>> On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
>> > On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
>> >>
On Thu, Jun 15, 2017 at 1:02 PM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
>> On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
>> > On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
>> >> On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen
On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
> On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
> > On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
> >> On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
> >> >
On Thu, Jun 15, 2017 at 12:35:39PM -0700, Stephane Eranian wrote:
> On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
> > On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
> >> On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
> >> > On Thu, Jun 15, 2017 at 06:56:24AM -0700,
On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
>> On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
>> > On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
>> >>
On Thu, Jun 15, 2017 at 10:23 AM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
>> On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
>> > On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
>> >> This patchs adds a new sample record type
On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
> On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
> > On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
> >> This patchs adds a new sample record type called
> >> PERF_SAMPLE_SKID_IP. The
On Thu, Jun 15, 2017 at 09:44:07AM -0700, Stephane Eranian wrote:
> On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
> > On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
> >> This patchs adds a new sample record type called
> >> PERF_SAMPLE_SKID_IP. The goal is to record
> >>
On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
>> This patchs adds a new sample record type called
>> PERF_SAMPLE_SKID_IP. The goal is to record
>> the unmodified interrupted instruction pointer (IP) as
On Thu, Jun 15, 2017 at 8:10 AM, Andi Kleen wrote:
> On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
>> This patchs adds a new sample record type called
>> PERF_SAMPLE_SKID_IP. The goal is to record
>> the unmodified interrupted instruction pointer (IP) as seen by
>> the kernel
On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
> This patchs adds a new sample record type called
> PERF_SAMPLE_SKID_IP. The goal is to record
> the unmodified interrupted instruction pointer (IP) as seen by
> the kernel and reflected in the machine state.
Patches look
On Thu, Jun 15, 2017 at 06:56:24AM -0700, Stephane Eranian wrote:
> This patchs adds a new sample record type called
> PERF_SAMPLE_SKID_IP. The goal is to record
> the unmodified interrupted instruction pointer (IP) as seen by
> the kernel and reflected in the machine state.
Patches look
This patchs adds a new sample record type called
PERF_SAMPLE_SKID_IP. The goal is to record
the unmodified interrupted instruction pointer (IP) as seen by
the kernel and reflected in the machine state.
On some architectures, it is possible to avoid the IP skid using
hardware support. For
This patchs adds a new sample record type called
PERF_SAMPLE_SKID_IP. The goal is to record
the unmodified interrupted instruction pointer (IP) as seen by
the kernel and reflected in the machine state.
On some architectures, it is possible to avoid the IP skid using
hardware support. For
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