[PATCH 01/14] ARM: Add Krait L2 register accessor functions

2018-08-13 Thread Sricharan R
From: Stephen Boyd Krait CPUs have a handful of L2 cache controller registers that live behind a cp15 based indirection register. First you program the indirection register (l2cpselr) to point the L2 'window' register (l2cpdr) at what you want to read/write. Then you read/write the 'window'

[PATCH 01/14] ARM: Add Krait L2 register accessor functions

2018-08-13 Thread Sricharan R
From: Stephen Boyd Krait CPUs have a handful of L2 cache controller registers that live behind a cp15 based indirection register. First you program the indirection register (l2cpselr) to point the L2 'window' register (l2cpdr) at what you want to read/write. Then you read/write the 'window'