Re: [PATCH 05/20] ARM: implement pci_remap_cfgspace() interface

2017-03-21 Thread Russell King - ARM Linux
On Tue, Mar 21, 2017 at 03:26:36PM +, Lorenzo Pieralisi wrote: > I assumed that in plain terms, the difference between MT_DEVICE and > MT_UNCACHED is write posting (aka bufferable) behaviour (across CPU > architecture versions) and that does not affect write ordering rules. Having looked it

Re: [PATCH 05/20] ARM: implement pci_remap_cfgspace() interface

2017-03-21 Thread Russell King - ARM Linux
On Tue, Mar 21, 2017 at 03:26:36PM +, Lorenzo Pieralisi wrote: > I assumed that in plain terms, the difference between MT_DEVICE and > MT_UNCACHED is write posting (aka bufferable) behaviour (across CPU > architecture versions) and that does not affect write ordering rules. Having looked it

Re: [PATCH 05/20] ARM: implement pci_remap_cfgspace() interface

2017-03-21 Thread Lorenzo Pieralisi
Hi Russell, On Mon, Mar 20, 2017 at 04:43:55PM +, Russell King - ARM Linux wrote: > On Mon, Feb 27, 2017 at 03:14:16PM +, Lorenzo Pieralisi wrote: > > The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering > > and Posting") define rules for PCI configuration space transactions >

Re: [PATCH 05/20] ARM: implement pci_remap_cfgspace() interface

2017-03-21 Thread Lorenzo Pieralisi
Hi Russell, On Mon, Mar 20, 2017 at 04:43:55PM +, Russell King - ARM Linux wrote: > On Mon, Feb 27, 2017 at 03:14:16PM +, Lorenzo Pieralisi wrote: > > The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering > > and Posting") define rules for PCI configuration space transactions >

Re: [PATCH 05/20] ARM: implement pci_remap_cfgspace() interface

2017-03-20 Thread Russell King - ARM Linux
On Mon, Feb 27, 2017 at 03:14:16PM +, Lorenzo Pieralisi wrote: > The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering > and Posting") define rules for PCI configuration space transactions > ordering and posting, that state that configuration writes have to > be non-posted

Re: [PATCH 05/20] ARM: implement pci_remap_cfgspace() interface

2017-03-20 Thread Russell King - ARM Linux
On Mon, Feb 27, 2017 at 03:14:16PM +, Lorenzo Pieralisi wrote: > The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering > and Posting") define rules for PCI configuration space transactions > ordering and posting, that state that configuration writes have to > be non-posted

[PATCH 05/20] ARM: implement pci_remap_cfgspace() interface

2017-02-27 Thread Lorenzo Pieralisi
The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering and Posting") define rules for PCI configuration space transactions ordering and posting, that state that configuration writes have to be non-posted transactions. Current ioremap interface on ARM provides mapping functions that

[PATCH 05/20] ARM: implement pci_remap_cfgspace() interface

2017-02-27 Thread Lorenzo Pieralisi
The PCI bus specifications (rev 3.0, 3.2.5 "Transaction Ordering and Posting") define rules for PCI configuration space transactions ordering and posting, that state that configuration writes have to be non-posted transactions. Current ioremap interface on ARM provides mapping functions that