On Sun, Jun 2, 2013 at 10:47 AM, Adis Hamzić wrote:
> The current radeon driver initialization routines, when using KMS, are written
> so that the IRQ installation routine is called before initializing the WB
> buffer
> and the CP rings. With some ASICs, though, the IRQ routine tries to access
On Sun, Jun 2, 2013 at 10:47 AM, Adis Hamzić a...@hamzadis.com wrote:
The current radeon driver initialization routines, when using KMS, are written
so that the IRQ installation routine is called before initializing the WB
buffer
and the CP rings. With some ASICs, though, the IRQ routine
The current radeon driver initialization routines, when using KMS, are written
so that the IRQ installation routine is called before initializing the WB buffer
and the CP rings. With some ASICs, though, the IRQ routine tries to access the
GFX_INDEX ring causing a call to RREG32 with the value of
The current radeon driver initialization routines, when using KMS, are written
so that the IRQ installation routine is called before initializing the WB buffer
and the CP rings. With some ASICs, though, the IRQ routine tries to access the
GFX_INDEX ring causing a call to RREG32 with the value of
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