Re: [PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-10-11 Thread Natarajan, Janakarajan
On 10/10/2019 6:22 AM, Thomas Renninger wrote: > On Monday, October 7, 2019 11:11:30 PM CEST Natarajan, Janakarajan wrote: >> On 10/5/2019 7:40 AM, Thomas Renninger wrote: >> > ... APERF/MPERF from CPL > 0) and avoid using the msr module (patch 2). >>> And this one only exists on latest AMD

Re: [PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-10-10 Thread Thomas Renninger
On Monday, October 7, 2019 11:11:30 PM CEST Natarajan, Janakarajan wrote: > On 10/5/2019 7:40 AM, Thomas Renninger wrote: > ... > >> > >> APERF/MPERF from CPL > 0) and avoid using the msr module (patch 2). > > > > And this one only exists on latest AMD cpus, right? > > Yes. The RDPRU

Re: [PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-10-07 Thread Natarajan, Janakarajan
On 10/5/2019 7:40 AM, Thomas Renninger wrote: > Hi, > > On Wednesday, October 2, 2019 4:45:03 PM CEST Natarajan, Janakarajan wrote: >> On 9/27/19 4:48 PM, Thomas Renninger wrote: >> >>> On Friday, September 27, 2019 6:07:56 PM CEST Natarajan, Janakarajan >>> wrote: On 9/18/2019 11:34 AM,

Re: [PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-10-05 Thread Thomas Renninger
Hi, On Wednesday, October 2, 2019 4:45:03 PM CEST Natarajan, Janakarajan wrote: > On 9/27/19 4:48 PM, Thomas Renninger wrote: > > > On Friday, September 27, 2019 6:07:56 PM CEST Natarajan, Janakarajan > > wrote: > > >> On 9/18/2019 11:34 AM, Natarajan, Janakarajan wrote: > On a 256

Re: [PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-10-02 Thread Natarajan, Janakarajan
On 9/27/19 4:48 PM, Thomas Renninger wrote: > On Friday, September 27, 2019 6:07:56 PM CEST Natarajan, Janakarajan wrote: >> On 9/18/2019 11:34 AM, Natarajan, Janakarajan wrote: >>> This is advantageous because an IPI is not generated when a read_msr() is >>> executed on the local logical CPU

Re: [PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-09-30 Thread Natarajan, Janakarajan
On 9/27/2019 1:59 PM, shuah wrote: > On 9/18/19 10:34 AM, Natarajan, Janakarajan wrote: >> Modify cpupower to schedule itself on each of the cpus in the system and >> then get the APERF/MPERF register values. >> >> This is advantageous because an IPI is not generated when a >> read_msr() is >>

Re: [PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-09-27 Thread Thomas Renninger
On Friday, September 27, 2019 6:07:56 PM CEST Natarajan, Janakarajan wrote: > On 9/18/2019 11:34 AM, Natarajan, Janakarajan wrote: > > This is advantageous because an IPI is not generated when a read_msr() is > > executed on the local logical CPU thereby reducing the chance of having > > APERF

Re: [PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-09-27 Thread shuah
On 9/18/19 10:34 AM, Natarajan, Janakarajan wrote: Modify cpupower to schedule itself on each of the cpus in the system and then get the APERF/MPERF register values. This is advantageous because an IPI is not generated when a read_msr() is executed on the local logical CPU thereby reducing the

Re: [PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-09-27 Thread Natarajan, Janakarajan
On 9/18/2019 11:34 AM, Natarajan, Janakarajan wrote: > Modify cpupower to schedule itself on each of the cpus in the system and > then get the APERF/MPERF register values. > > This is advantageous because an IPI is not generated when a read_msr() is > executed on the local logical CPU thereby

[PATCH 1/2] Modify cpupower to schedule itself on cores it is reading MSRs from

2019-09-18 Thread Natarajan, Janakarajan
Modify cpupower to schedule itself on each of the cpus in the system and then get the APERF/MPERF register values. This is advantageous because an IPI is not generated when a read_msr() is executed on the local logical CPU thereby reducing the chance of having APERF and MPERF being out of sync.