On 6/20/19 1:13 AM, Tao Ren wrote:
> On 6/20/19 1:01 AM, Ryan Chen wrote:
>> Hello Tao,
>> Let me more clear. When you set (3, 15, 14) the device sometimes
>> response nack.
>> but when you set (4, 7, 7), the device always ack. Am I right?
>> Ryan
>
> Hello Ryan,
>
> It's correct. We
On 6/20/19 1:01 AM, Ryan Chen wrote:
> Hello Tao,
> Let me more clear. When you set (3, 15, 14) the device sometimes
> response nack.
> but when you set (4, 7, 7), the device always ack. Am I right?
> Ryan
Hello Ryan,
It's correct. We have seen the problem on 2 Facebook BMC platfor
; Brendan Higgins
Cc: Mark Rutland ; devicetree
; linux-asp...@lists.ozlabs.org; OpenBMC Maillist
; Linux Kernel Mailing List
; Rob Herring ; Linux ARM
; linux-...@vger.kernel.org
Subject: Re: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor
On 6/20/19 12:29 AM, Ryan Chen wrote
: Thursday, June 20, 2019 6:33 AM
To: Brendan Higgins
Cc: Mark Rutland ; devicetree
; linux-asp...@lists.ozlabs.org; OpenBMC Maillist
; Linux Kernel Mailing List
; Rob Herring ; Linux ARM
; linux-...@vger.kernel.org
Subject: Re: [PATCH 1/2] i2c: aspeed: allow to customize base clock divisor
On 6/19/19
On 6/20/19 12:29 AM, Ryan Chen wrote:
> Hello Tao,
> Our recommend about clk divider setting is follow the datasheet clock
> setting table for clock divisor.
>
> Ryan
Thanks Ryan for the response. Could you also share some recommendations/hints
on how to solve the intermittent i2c tran
On 6/19/19 4:02 PM, Benjamin Herrenschmidt wrote:
> On Wed, 2019-06-19 at 22:32 +, Tao Ren wrote:
>> Thank you for the quick response, Brendan.
>>
>> Aspeed I2C bus frequency is defined by 3 parameters
>> (base_clk_divisor, clk_high_width, clk_low_width), and I choose
>> base_clk_divisor becaus
On Wed, 2019-06-19 at 22:32 +, Tao Ren wrote:
> Thank you for the quick response, Brendan.
>
> Aspeed I2C bus frequency is defined by 3 parameters
> (base_clk_divisor, clk_high_width, clk_low_width), and I choose
> base_clk_divisor because it controls all the Aspeed I2C timings (such
> as setu
On 6/19/19 2:25 PM, Brendan Higgins wrote:
> On Wed, Jun 19, 2019 at 2:00 PM Tao Ren wrote:
>>
>> Some intermittent I2C transaction failures are observed on Facebook CMM and
>> Minipack (ast2500) BMC platforms, because slave devices (such as CPLD, BIC
>> and etc.) NACK the address byte sometimes.
On Wed, Jun 19, 2019 at 2:00 PM Tao Ren wrote:
>
> Some intermittent I2C transaction failures are observed on Facebook CMM and
> Minipack (ast2500) BMC platforms, because slave devices (such as CPLD, BIC
> and etc.) NACK the address byte sometimes. The issue can be resolved by
> increasing base cl
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