Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

Hi Laurent > > >>> +static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan) > > >>> +{ > > >>> + u32 chcr; > > >>> + int i; > > >> > > >> unsigned int > > >> > > >>> + > > >>> + /* > > >>> +* Ensure that the setting of the DE bit is actually 0 after > > >>>

Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

Hi Laurent > > >>> +static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan) > > >>> +{ > > >>> + u32 chcr; > > >>> + int i; > > >> > > >> unsigned int > > >> > > >>> + > > >>> + /* > > >>> +* Ensure that the setting of the DE bit is actually 0 after > > >>>

Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

On Friday, 17 November 2017 10:41:05 EET Geert Uytterhoeven wrote: > On Fri, Nov 17, 2017 at 1:10 AM, Kuninori Morimoto wrote: > >>> +static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan) > >>> +{ > >>> + u32 chcr; > >>> + int i; > >> > >> unsigned int > >> > >>> + > >>>

Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

On Friday, 17 November 2017 10:41:05 EET Geert Uytterhoeven wrote: > On Fri, Nov 17, 2017 at 1:10 AM, Kuninori Morimoto wrote: > >>> +static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan) > >>> +{ > >>> + u32 chcr; > >>> + int i; > >> > >> unsigned int > >> > >>> + > >>>

Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

Hi Morimoto-san, On Fri, Nov 17, 2017 at 1:10 AM, Kuninori Morimoto wrote: >> > +static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan) >> > +{ >> > + u32 chcr; >> > + int i; >> >> unsigned int >> >> > + >> > + /* >> > +*

Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

Hi Morimoto-san, On Fri, Nov 17, 2017 at 1:10 AM, Kuninori Morimoto wrote: >> > +static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan *chan) >> > +{ >> > + u32 chcr; >> > + int i; >> >> unsigned int >> >> > + >> > + /* >> > +* Ensure that the setting of the DE

Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

Hi Geert > > DMAC reads data from source device, and buffered it until transferable > > size for shink device. Because of this behavoir, DMAC is including > > sink, behavior (snip) > > 0 after cleared. > > clearing Grr, thanks. > > +static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan

Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

Hi Geert > > DMAC reads data from source device, and buffered it until transferable > > size for shink device. Because of this behavoir, DMAC is including > > sink, behavior (snip) > > 0 after cleared. > > clearing Grr, thanks. > > +static void rcar_dmac_chcr_de_barrier(struct rcar_dmac_chan

Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

Hi Morimoto-san, On Thu, Nov 16, 2017 at 5:33 AM, Kuninori Morimoto wrote: > From: Kuninori Morimoto Thanks for your patch! > DMAC reads data from source device, and buffered it until transferable > size for shink device.

Re: [PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

Hi Morimoto-san, On Thu, Nov 16, 2017 at 5:33 AM, Kuninori Morimoto wrote: > From: Kuninori Morimoto Thanks for your patch! > DMAC reads data from source device, and buffered it until transferable > size for shink device. Because of this behavoir, DMAC is including sink, behavior > buffered

[PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

From: Kuninori Morimoto DMAC reads data from source device, and buffered it until transferable size for shink device. Because of this behavoir, DMAC is including buffered data . Now, CHCR DE bit is controlling DMA transfer enable/disable. If DE bit was cleared

[PATCH 1/2 v2] dmaengine: rcar-dmac: ensure CHCR DE bit is actually 0 after clear

From: Kuninori Morimoto DMAC reads data from source device, and buffered it until transferable size for shink device. Because of this behavoir, DMAC is including buffered data . Now, CHCR DE bit is controlling DMA transfer enable/disable. If DE bit was cleared during data transferring, or