Re: [PATCH 1/3] clk: keystone: sci-clk: fix parsing assigned-clock data during probe

2020-09-22 Thread Stephen Boyd
Quoting Tero Kristo (2020-09-07 01:57:38) > The DT clock probe loop incorrectly terminates after processing "clocks" > only, fix this by re-starting the loop when all entries for current > DT property have been parsed. > > Fixes: 8e48b33f9def ("clk: keystone: sci-clk: probe clocks from DT instead

[PATCH 1/3] clk: keystone: sci-clk: fix parsing assigned-clock data during probe

2020-09-07 Thread Tero Kristo
The DT clock probe loop incorrectly terminates after processing "clocks" only, fix this by re-starting the loop when all entries for current DT property have been parsed. Fixes: 8e48b33f9def ("clk: keystone: sci-clk: probe clocks from DT instead of firmware") Reported-by: Peter Ujfalusi