[PATCH 1/3] ntb: Add asynchronous devices support to NTB-bus interface

Currently supported AMD and Intel Non-transparent PCIe-bridges are synchronous devices, so translated base address of memory windows can be direcly written to peer registers. But there are some IDT PCIe-switches which implement complex interfaces using Lookup Tables of translation addresses. Due

[PATCH 1/3] ntb: Add asynchronous devices support to NTB-bus interface

Currently supported AMD and Intel Non-transparent PCIe-bridges are synchronous devices, so translated base address of memory windows can be direcly written to peer registers. But there are some IDT PCIe-switches which implement complex interfaces using Lookup Tables of translation addresses. Due