Re: [PATCH 1/3] pwm: lpss: Add support for multiple PWMs

2015-11-06 Thread Mika Westerberg
On Fri, Nov 06, 2015 at 02:29:53PM +0100, Thierry Reding wrote: > On Tue, Oct 20, 2015 at 04:53:05PM +0300, Mika Westerberg wrote: > > New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) > > device. Each PWM has 1k of register space allocated from the parent device. > > Add

Re: [PATCH 1/3] pwm: lpss: Add support for multiple PWMs

2015-11-06 Thread Thierry Reding
On Tue, Oct 20, 2015 at 04:53:05PM +0300, Mika Westerberg wrote: > New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) > device. Each PWM has 1k of register space allocated from the parent device. > Add support for this. > > Signed-off-by: Mika Westerberg > --- >

Re: [PATCH 1/3] pwm: lpss: Add support for multiple PWMs

2015-11-06 Thread Mika Westerberg
On Tue, Oct 20, 2015 at 04:53:05PM +0300, Mika Westerberg wrote: > New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) > device. Each PWM has 1k of register space allocated from the parent device. > Add support for this. Hi Thierry, Are you going to pick these up to PWM tree?

Re: [PATCH 1/3] pwm: lpss: Add support for multiple PWMs

2015-11-06 Thread Mika Westerberg
On Tue, Oct 20, 2015 at 04:53:05PM +0300, Mika Westerberg wrote: > New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) > device. Each PWM has 1k of register space allocated from the parent device. > Add support for this. Hi Thierry, Are you going to pick these up to PWM tree?

Re: [PATCH 1/3] pwm: lpss: Add support for multiple PWMs

2015-11-06 Thread Thierry Reding
On Tue, Oct 20, 2015 at 04:53:05PM +0300, Mika Westerberg wrote: > New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) > device. Each PWM has 1k of register space allocated from the parent device. > Add support for this. > > Signed-off-by: Mika Westerberg

Re: [PATCH 1/3] pwm: lpss: Add support for multiple PWMs

2015-11-06 Thread Mika Westerberg
On Fri, Nov 06, 2015 at 02:29:53PM +0100, Thierry Reding wrote: > On Tue, Oct 20, 2015 at 04:53:05PM +0300, Mika Westerberg wrote: > > New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) > > device. Each PWM has 1k of register space allocated from the parent device. > > Add

[PATCH 1/3] pwm: lpss: Add support for multiple PWMs

2015-10-20 Thread Mika Westerberg
New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) device. Each PWM has 1k of register space allocated from the parent device. Add support for this. Signed-off-by: Mika Westerberg --- drivers/pwm/pwm-lpss.c | 48 +++-

[PATCH 1/3] pwm: lpss: Add support for multiple PWMs

2015-10-20 Thread Mika Westerberg
New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) device. Each PWM has 1k of register space allocated from the parent device. Add support for this. Signed-off-by: Mika Westerberg --- drivers/pwm/pwm-lpss.c | 48