We have one ARM PL330 DMA instance with 8 channels in
NS2 SoC. Let's enable it for NS2 in NS2 DT.

Signed-off-by: Anup Patel <anup.pa...@broadcom.com>
Reviewed-by: Ray Jui <r...@broadcom.com>
Reviewed-by: Pramod KUMAR <pramo...@broadcom.com>
Reviewed-by: Scott Branden <sbran...@broadcom.com>
---
 arch/arm64/boot/dts/broadcom/ns2.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi 
b/arch/arm64/boot/dts/broadcom/ns2.dtsi
index 6f81c9d..a9f4585 100644
--- a/arch/arm64/boot/dts/broadcom/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi
@@ -217,6 +217,25 @@
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
 
+               dma0: dma@61360000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x61360000 0x1000>;
+                       interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       #dma-channels = <8>;
+                       #dma-requests = <32>;
+                       clocks = <&iprocslow>;
+                       clock-names = "apb_pclk";
+               };
+
                smmu: mmu@64000000 {
                        compatible = "arm,mmu-500";
                        reg = <0x64000000 0x40000>;
-- 
1.9.1

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