[PATCH 18/19] clk: tegra: Add Super Gen5 Logic

From: Bill Huang Super clock divider control and clock source mux of Tegra210 has changed a little against prior SoCs, this patch adds Gen5 logic to address those differences. Signed-off-by: Bill Huang --- drivers/clk/tegra/Makefile |1 +

[PATCH 18/19] clk: tegra: Add Super Gen5 Logic

From: Bill Huang bilhu...@nvidia.com Super clock divider control and clock source mux of Tegra210 has changed a little against prior SoCs, this patch adds Gen5 logic to address those differences. Signed-off-by: Bill Huang bilhu...@nvidia.com --- drivers/clk/tegra/Makefile |1 +