Re: [PATCH 2/2] clk: meson: axg: let mpll clocks round closest

On 20/04/2018 11:56, Jerome Brunet wrote: > Let the mpll dividers achieve the closest rate possible, even if > it means rounding the requested rate up. > > This is done to improve the accuracy of the rates provided by these > plls to the audio subsystem > > Signed-off-by: Jerome Brunet

Re: [PATCH 2/2] clk: meson: axg: let mpll clocks round closest

On 20/04/2018 11:56, Jerome Brunet wrote: > Let the mpll dividers achieve the closest rate possible, even if > it means rounding the requested rate up. > > This is done to improve the accuracy of the rates provided by these > plls to the audio subsystem > > Signed-off-by: Jerome Brunet > --- >

[PATCH 2/2] clk: meson: axg: let mpll clocks round closest

Let the mpll dividers achieve the closest rate possible, even if it means rounding the requested rate up. This is done to improve the accuracy of the rates provided by these plls to the audio subsystem Signed-off-by: Jerome Brunet --- drivers/clk/meson/axg.c | 4 1

[PATCH 2/2] clk: meson: axg: let mpll clocks round closest

Let the mpll dividers achieve the closest rate possible, even if it means rounding the requested rate up. This is done to improve the accuracy of the rates provided by these plls to the audio subsystem Signed-off-by: Jerome Brunet --- drivers/clk/meson/axg.c | 4 1 file changed, 4