Re: [PATCH 2/2] net: macb: Add support for SiFive FU540-C000

2019-05-29 Thread Palmer Dabbelt
On Fri, 24 May 2019 06:48:47 PDT (-0700), and...@lunn.ch wrote: On Fri, May 24, 2019 at 10:22:06AM +0530, Yash Shah wrote: On Thu, May 23, 2019 at 8:24 PM Andrew Lunn wrote: > > > +static int fu540_macb_tx_set_rate(struct clk_hw *hw, unsigned long rate, > > +

Re: [PATCH 2/2] net: macb: Add support for SiFive FU540-C000

2019-05-24 Thread Andrew Lunn
On Fri, May 24, 2019 at 10:22:06AM +0530, Yash Shah wrote: > On Thu, May 23, 2019 at 8:24 PM Andrew Lunn wrote: > > > > > +static int fu540_macb_tx_set_rate(struct clk_hw *hw, unsigned long rate, > > > + unsigned long parent_rate) > > > +{ > > > + rate =

Re: [PATCH 2/2] net: macb: Add support for SiFive FU540-C000

2019-05-23 Thread Yash Shah
On Thu, May 23, 2019 at 8:24 PM Andrew Lunn wrote: > > > +static int fu540_macb_tx_set_rate(struct clk_hw *hw, unsigned long rate, > > + unsigned long parent_rate) > > +{ > > + rate = fu540_macb_tx_round_rate(hw, rate, _rate); > > + iowrite32(rate !=

Re: [PATCH 2/2] net: macb: Add support for SiFive FU540-C000

2019-05-23 Thread Andrew Lunn
> +static int fu540_macb_tx_set_rate(struct clk_hw *hw, unsigned long rate, > + unsigned long parent_rate) > +{ > + rate = fu540_macb_tx_round_rate(hw, rate, _rate); > + iowrite32(rate != 12500, mgmt->reg); That looks odd. Writing the result of a

[PATCH 2/2] net: macb: Add support for SiFive FU540-C000

2019-05-23 Thread Yash Shah
The management IP block is tightly coupled with the Cadence MACB IP block on the FU540, and manages many of the boundary signals from the MACB IP. This patch only controls the tx_clk input signal to the MACB IP. Future patches may add support for monitoring or controlling other IP boundary