ping
On 07/19/2013 10:46 AM, Yan, Zheng wrote:
> From: "Yan, Zheng"
>
> Compare to old atom, Silvermont has offcore and has more events
> that support PEBS.
>
> Signed-off-by: Yan, Zheng
> ---
> Changes since v1:
> - test shows that "event 0x013c != fixed counter2", fix the code
> - remove
ping
On 07/19/2013 10:46 AM, Yan, Zheng wrote:
From: Yan, Zheng zheng.z@intel.com
Compare to old atom, Silvermont has offcore and has more events
that support PEBS.
Signed-off-by: Yan, Zheng zheng.z@intel.com
---
Changes since v1:
- test shows that event 0x013c != fixed
From: "Yan, Zheng"
Compare to old atom, Silvermont has offcore and has more events
that support PEBS.
Signed-off-by: Yan, Zheng
---
Changes since v1:
- test shows that "event 0x013c != fixed counter2", fix the code
- remove _PS suffixes in PEBS events' comments
- add mode number 77 for
On Thu, Jul 18, 2013 at 11:02 AM, Yan, Zheng wrote:
> From: "Yan, Zheng"
>
> Compare to old atom, Silvermont has offcore and has more events
> that support PEBS.
>
> Signed-off-by: Yan, Zheng
> ---
> arch/x86/kernel/cpu/perf_event.h | 2 +
> arch/x86/kernel/cpu/perf_event_intel.c
On Thu, Jul 18, 2013 at 05:02:24PM +0800, Yan, Zheng wrote:
> +static struct event_constraint intel_slm_event_constraints[] __read_mostly =
> +{
> + FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
> + FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
> +
From: "Yan, Zheng"
Compare to old atom, Silvermont has offcore and has more events
that support PEBS.
Signed-off-by: Yan, Zheng
---
arch/x86/kernel/cpu/perf_event.h | 2 +
arch/x86/kernel/cpu/perf_event_intel.c| 158 ++
From: Yan, Zheng zheng.z@intel.com
Compare to old atom, Silvermont has offcore and has more events
that support PEBS.
Signed-off-by: Yan, Zheng zheng.z@intel.com
---
arch/x86/kernel/cpu/perf_event.h | 2 +
arch/x86/kernel/cpu/perf_event_intel.c| 158
On Thu, Jul 18, 2013 at 05:02:24PM +0800, Yan, Zheng wrote:
+static struct event_constraint intel_slm_event_constraints[] __read_mostly =
+{
+ FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */
+ FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */
+
On Thu, Jul 18, 2013 at 11:02 AM, Yan, Zheng zheng.z@intel.com wrote:
From: Yan, Zheng zheng.z@intel.com
Compare to old atom, Silvermont has offcore and has more events
that support PEBS.
Signed-off-by: Yan, Zheng zheng.z@intel.com
---
arch/x86/kernel/cpu/perf_event.h
From: Yan, Zheng zheng.z@intel.com
Compare to old atom, Silvermont has offcore and has more events
that support PEBS.
Signed-off-by: Yan, Zheng zheng.z@intel.com
---
Changes since v1:
- test shows that event 0x013c != fixed counter2, fix the code
- remove _PS suffixes in PEBS events'
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