On 9/24/19 11:47 AM, Marc Zyngier wrote:
Eddie,
On 24/09/2019 17:14, Eddie James wrote:
The Aspeed SOCs provide some interrupts through the System Control
Unit registers. Add an interrupt controller that provides these
interrupts to the system.
Signed-off-by: Eddie James
---
MAINTAINERS
Eddie,
On 24/09/2019 17:14, Eddie James wrote:
> The Aspeed SOCs provide some interrupts through the System Control
> Unit registers. Add an interrupt controller that provides these
> interrupts to the system.
>
> Signed-off-by: Eddie James
> ---
> MAINTAINERS | 1 +
>
The Aspeed SOCs provide some interrupts through the System Control
Unit registers. Add an interrupt controller that provides these
interrupts to the system.
Signed-off-by: Eddie James
---
MAINTAINERS | 1 +
drivers/irqchip/Makefile| 2 +-
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