Linas Vepstas wrote:
On Wed, Jul 06, 2005 at 02:17:21PM +0900, Hidetoshi Seto was heard to remark:
Touching poisoned data become a MCA, so now it directly means
Several questions:
Is MCA an exception or fault of some sort, so at some point,
the kernel would catch a fault?
So when you
On Wed, Jul 06, 2005 at 02:17:21PM +0900, Hidetoshi Seto was heard to remark:
>
> Touching poisoned data become a MCA, so now it directly means
Several questions:
Is MCA an exception or fault of some sort, so at some point,
the kernel would catch a fault?
So when you say "Touching poisoned
On Wed, Jul 06, 2005 at 02:17:21PM +0900, Hidetoshi Seto was heard to remark:
Touching poisoned data become a MCA, so now it directly means
Several questions:
Is MCA an exception or fault of some sort, so at some point,
the kernel would catch a fault?
So when you say Touching poisoned data
Linas Vepstas wrote:
On Wed, Jul 06, 2005 at 02:17:21PM +0900, Hidetoshi Seto was heard to remark:
Touching poisoned data become a MCA, so now it directly means
Several questions:
Is MCA an exception or fault of some sort, so at some point,
the kernel would catch a fault?
So when you
david mosberger wrote:
- could anyone write same barrier for intel compiler?
Tony or David, could you help me?
I think it might be best to make ia64_mca_barrier() a proper
subroutine written in assembly code. Yes, that costs some time, but
we're talking about wasting 1,000+ cycles just
On 7/5/05, Hidetoshi Seto <[EMAIL PROTECTED]> wrote:
>- could anyone write same barrier for intel compiler?
> Tony or David, could you help me?
I think it might be best to make ia64_mca_barrier() a proper
subroutine written in assembly code. Yes, that costs some time, but
we're talking
On 7/5/05, Hidetoshi Seto [EMAIL PROTECTED] wrote:
- could anyone write same barrier for intel compiler?
Tony or David, could you help me?
I think it might be best to make ia64_mca_barrier() a proper
subroutine written in assembly code. Yes, that costs some time, but
we're talking
david mosberger wrote:
- could anyone write same barrier for intel compiler?
Tony or David, could you help me?
I think it might be best to make ia64_mca_barrier() a proper
subroutine written in assembly code. Yes, that costs some time, but
we're talking about wasting 1,000+ cycles just
[This is 7 of 10 patches, "iochk-07-poison.patch"]
- When bus-error occur on write, write data is broken on
the bus, so target device gets broken data.
There are 2 way for such device to take:
- send PERR(Parity Error) to host, expecting immediate panic.
- mark status register as
[This is 7 of 10 patches, iochk-07-poison.patch]
- When bus-error occur on write, write data is broken on
the bus, so target device gets broken data.
There are 2 way for such device to take:
- send PERR(Parity Error) to host, expecting immediate panic.
- mark status register as error,
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