On Monday 22 June 2015 07:06 PM, Will Deacon wrote:
>> OK, so given that regular/mmio is also weakly ordered, it would seem that we
>> need
>> > full mb() *before* and *after* the IO access in the non relaxed API. ARM
>> > code
>> > seems to put a rmb() after the readl and wmb() before the
On Monday 22 June 2015 07:06 PM, Will Deacon wrote:
OK, so given that regular/mmio is also weakly ordered, it would seem that we
need
full mb() *before* and *after* the IO access in the non relaxed API. ARM
code
seems to put a rmb() after the readl and wmb() before the writel. Is that
On Fri, Jun 19, 2015 at 02:13:02PM +0100, Vineet Gupta wrote:
> On Thursday 11 June 2015 07:09 PM, Will Deacon wrote:
> > On Thu, Jun 11, 2015 at 01:13:28PM +0100, Vineet Gupta wrote:
> >> On Wednesday 10 June 2015 06:31 PM, Will Deacon wrote:
> >>> You also need that guarantee in your
On Fri, Jun 19, 2015 at 02:13:02PM +0100, Vineet Gupta wrote:
On Thursday 11 June 2015 07:09 PM, Will Deacon wrote:
On Thu, Jun 11, 2015 at 01:13:28PM +0100, Vineet Gupta wrote:
On Wednesday 10 June 2015 06:31 PM, Will Deacon wrote:
You also need that guarantee in your readl/writel family
On Thursday 11 June 2015 07:09 PM, Will Deacon wrote:
> On Thu, Jun 11, 2015 at 01:13:28PM +0100, Vineet Gupta wrote:
>> On Wednesday 10 June 2015 06:31 PM, Will Deacon wrote:
>>> On Wed, Jun 10, 2015 at 11:58:40AM +0100, Peter Zijlstra wrote:
On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet
On Thursday 11 June 2015 07:09 PM, Will Deacon wrote:
On Thu, Jun 11, 2015 at 01:13:28PM +0100, Vineet Gupta wrote:
On Wednesday 10 June 2015 06:31 PM, Will Deacon wrote:
On Wed, Jun 10, 2015 at 11:58:40AM +0100, Peter Zijlstra wrote:
On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet Gupta
On Thu, Jun 11, 2015 at 01:13:28PM +0100, Vineet Gupta wrote:
> On Wednesday 10 June 2015 06:31 PM, Will Deacon wrote:
> > On Wed, Jun 10, 2015 at 11:58:40AM +0100, Peter Zijlstra wrote:
> >> On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet Gupta wrote:
> >>> On Tuesday 09 June 2015 06:10 PM,
On Wednesday 10 June 2015 06:31 PM, Will Deacon wrote:
> On Wed, Jun 10, 2015 at 11:58:40AM +0100, Peter Zijlstra wrote:
>> On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet Gupta wrote:
>>> On Tuesday 09 June 2015 06:10 PM, Peter Zijlstra wrote:
>> I think the most interesting part is the device
On Thu, Jun 11, 2015 at 01:13:28PM +0100, Vineet Gupta wrote:
On Wednesday 10 June 2015 06:31 PM, Will Deacon wrote:
On Wed, Jun 10, 2015 at 11:58:40AM +0100, Peter Zijlstra wrote:
On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet Gupta wrote:
On Tuesday 09 June 2015 06:10 PM, Peter Zijlstra
On Wednesday 10 June 2015 06:31 PM, Will Deacon wrote:
On Wed, Jun 10, 2015 at 11:58:40AM +0100, Peter Zijlstra wrote:
On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet Gupta wrote:
On Tuesday 09 June 2015 06:10 PM, Peter Zijlstra wrote:
I think the most interesting part is the device side.
On Wed, Jun 10, 2015 at 11:58:40AM +0100, Peter Zijlstra wrote:
> On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet Gupta wrote:
> > On Tuesday 09 June 2015 06:10 PM, Peter Zijlstra wrote:
> I think the most interesting part is the device side.
>
> > >> +/*
> > >> + * DSYNC:
> > >> + * - Waits
On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet Gupta wrote:
> On Tuesday 09 June 2015 06:10 PM, Peter Zijlstra wrote:
> > On Tue, Jun 09, 2015 at 05:18:20PM +0530, Vineet Gupta wrote:
> >
> > A description of how your hardware works; or a reference to the platform
> > documentation would not go
On Tuesday 09 June 2015 06:10 PM, Peter Zijlstra wrote:
> On Tue, Jun 09, 2015 at 05:18:20PM +0530, Vineet Gupta wrote:
>
> A description of how your hardware works; or a reference to the platform
> documentation would not go amiss.
Honestly the docs group is working on a publicly sharable
On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet Gupta wrote:
On Tuesday 09 June 2015 06:10 PM, Peter Zijlstra wrote:
On Tue, Jun 09, 2015 at 05:18:20PM +0530, Vineet Gupta wrote:
A description of how your hardware works; or a reference to the platform
documentation would not go amiss.
On Wed, Jun 10, 2015 at 11:58:40AM +0100, Peter Zijlstra wrote:
On Wed, Jun 10, 2015 at 09:34:18AM +, Vineet Gupta wrote:
On Tuesday 09 June 2015 06:10 PM, Peter Zijlstra wrote:
I think the most interesting part is the device side.
+/*
+ * DSYNC:
+ * - Waits for completion of
On Tuesday 09 June 2015 06:10 PM, Peter Zijlstra wrote:
On Tue, Jun 09, 2015 at 05:18:20PM +0530, Vineet Gupta wrote:
A description of how your hardware works; or a reference to the platform
documentation would not go amiss.
Honestly the docs group is working on a publicly sharable version of
On Tue, Jun 09, 2015 at 05:18:20PM +0530, Vineet Gupta wrote:
A description of how your hardware works; or a reference to the platform
documentation would not go amiss.
> +++ b/arch/arc/include/asm/barrier.h
> @@ -0,0 +1,48 @@
> +/*
> + * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
>
Cc: Peter Zijlstra (Intel)
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/Kbuild| 1 -
arch/arc/include/asm/barrier.h | 48 ++
2 files changed, 48 insertions(+), 1 deletion(-)
create mode 100644 arch/arc/include/asm/barrier.h
diff --git
Cc: Peter Zijlstra (Intel) pet...@infradead.org
Signed-off-by: Vineet Gupta vgu...@synopsys.com
---
arch/arc/include/asm/Kbuild| 1 -
arch/arc/include/asm/barrier.h | 48 ++
2 files changed, 48 insertions(+), 1 deletion(-)
create mode 100644
On Tue, Jun 09, 2015 at 05:18:20PM +0530, Vineet Gupta wrote:
A description of how your hardware works; or a reference to the platform
documentation would not go amiss.
+++ b/arch/arc/include/asm/barrier.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
+ *
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