On Fri, Sep 29, 2017 at 8:40 PM, Doug Berger wrote:
> Reading and writing the gpio bank status register each time a pending
> interrupt bit is serviced could cause new pending bits to be cleared
> without servicing the associated interrupts.
>
> By using the handle_level_irq flow instead of the ha
Reading and writing the gpio bank status register each time a pending
interrupt bit is serviced could cause new pending bits to be cleared
without servicing the associated interrupts.
By using the handle_level_irq flow instead of the handle_simple_irq
flow we get proper handling of interrupt maski
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