[PATCH 3.16 049/192] i2c: cadance: fix ctrl/addr reg write order

3.16.49-rc1 review patch. If anyone has any objections, please let me know. -- From: Matt Weber commit 8064c616984eaa015f018dba595d78cd24a0cc8c upstream. The driver was clearing the hold bit in the control register before writing to the

[PATCH 3.16 049/192] i2c: cadance: fix ctrl/addr reg write order

3.16.49-rc1 review patch. If anyone has any objections, please let me know. -- From: Matt Weber commit 8064c616984eaa015f018dba595d78cd24a0cc8c upstream. The driver was clearing the hold bit in the control register before writing to the address register which resulted in a