Re: [PATCH 4/4] pinctrl: aspeed-g5: Fix LPC register offsets

2020-09-30 Thread Andrew Jeffery
On Tue, 29 Sep 2020, at 22:12, Linus Walleij wrote: > On Fri, Sep 11, 2020 at 5:47 AM Chia-Wei, Wang > wrote: > > > The LPC register offsets are fixed to adapt to the LPC DTS change, > > where the LPC partitioning is removed. > > > > Signed-off-by: Chia-Wei, Wang > > I can apply this one

Re: [PATCH 4/4] pinctrl: aspeed-g5: Fix LPC register offsets

2020-09-29 Thread Linus Walleij
On Fri, Sep 11, 2020 at 5:47 AM Chia-Wei, Wang wrote: > The LPC register offsets are fixed to adapt to the LPC DTS change, > where the LPC partitioning is removed. > > Signed-off-by: Chia-Wei, Wang I can apply this one patch if I get a review from one of the Aspeed pinctrl maintainer. Andrew?

[PATCH 4/4] pinctrl: aspeed-g5: Fix LPC register offsets

2020-09-10 Thread Chia-Wei, Wang
The LPC register offsets are fixed to adapt to the LPC DTS change, where the LPC partitioning is removed. Signed-off-by: Chia-Wei, Wang --- drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c