On Fri, Jul 17, 2015 at 09:17:47PM +0100, Andi Kleen wrote:
> > As with my earlier comments, I don't think these can be grouped with
> > events (not even from the same PMU given their free-running nature).
>
> Mark, we already went through this last time. There is nothing
> stopping handling free
On Fri, Jul 17, 2015 at 09:17:47PM +0100, Andi Kleen wrote:
As with my earlier comments, I don't think these can be grouped with
events (not even from the same PMU given their free-running nature).
Mark, we already went through this last time. There is nothing
stopping handling free
> As with my earlier comments, I don't think these can be grouped with
> events (not even from the same PMU given their free-running nature).
Mark, we already went through this last time. There is nothing
stopping handling free running counters as part of other groups.
A perf event logically has
Hi,
On Fri, Jul 17, 2015 at 5:55 AM, Peter Zijlstra wrote:
> On Fri, Jul 17, 2015 at 01:21:06PM +0100, Mark Rutland wrote:
>>
>> As with my earlier comments, I don't think these can be grouped with
>> events (not even from the same PMU given their free-running nature).
>>
>> They're CPU-affine,
On Fri, Jul 17, 2015 at 01:21:06PM +0100, Mark Rutland wrote:
>
> As with my earlier comments, I don't think these can be grouped with
> events (not even from the same PMU given their free-running nature).
>
> They're CPU-affine, so you can associate them with work done on that
> CPU.
Just
On Thu, Jul 16, 2015 at 09:33:46PM +0100, kan.li...@intel.com wrote:
> From: Kan Liang
>
> This patch special case per-cpu core_misc PMU events and allow them to
> be part of any hardware/software group for system-wide monitoring.
> An useful example would be to include the ASTATE/MSTATE event
On Thu, Jul 16, 2015 at 09:33:46PM +0100, kan.li...@intel.com wrote:
From: Kan Liang kan.li...@intel.com
This patch special case per-cpu core_misc PMU events and allow them to
be part of any hardware/software group for system-wide monitoring.
An useful example would be to include the
On Fri, Jul 17, 2015 at 01:21:06PM +0100, Mark Rutland wrote:
As with my earlier comments, I don't think these can be grouped with
events (not even from the same PMU given their free-running nature).
They're CPU-affine, so you can associate them with work done on that
CPU.
Just record the
Hi,
On Fri, Jul 17, 2015 at 5:55 AM, Peter Zijlstra pet...@infradead.org wrote:
On Fri, Jul 17, 2015 at 01:21:06PM +0100, Mark Rutland wrote:
As with my earlier comments, I don't think these can be grouped with
events (not even from the same PMU given their free-running nature).
They're
As with my earlier comments, I don't think these can be grouped with
events (not even from the same PMU given their free-running nature).
Mark, we already went through this last time. There is nothing
stopping handling free running counters as part of other groups.
A perf event logically has a
From: Kan Liang
This patch special case per-cpu core_misc PMU events and allow them to
be part of any hardware/software group for system-wide monitoring.
An useful example would be to include the ASTATE/MSTATE event in a
sampling group. This can be used to calculate the frequency during each
From: Kan Liang kan.li...@intel.com
This patch special case per-cpu core_misc PMU events and allow them to
be part of any hardware/software group for system-wide monitoring.
An useful example would be to include the ASTATE/MSTATE event in a
sampling group. This can be used to calculate the
12 matches
Mail list logo
