Re: [PATCH 5/5] PCI: st: disable IO support

2015-01-21 Thread Gabriel Fernandez
Hi, Yes, we don't really care about this corner case. Thanks for your reviewing. BR Gabriel On 17 December 2014 at 15:01, One Thousand Gnomes wrote: > On Wed, 17 Dec 2014 11:34:46 +0100 > Gabriel FERNANDEZ wrote: > >> sti SoCs PCIe IPs are built around DesignWare IP Core. >> But in these

Re: [PATCH 5/5] PCI: st: disable IO support

2015-01-21 Thread Gabriel Fernandez
Hi, Yes, we don't really care about this corner case. Thanks for your reviewing. BR Gabriel On 17 December 2014 at 15:01, One Thousand Gnomes gno...@lxorguk.ukuu.org.uk wrote: On Wed, 17 Dec 2014 11:34:46 +0100 Gabriel FERNANDEZ gabriel.fernan...@st.com wrote: sti SoCs PCIe IPs are built

Re: [PATCH 5/5] PCI: st: disable IO support

2014-12-17 Thread One Thousand Gnomes
On Wed, 17 Dec 2014 11:34:46 +0100 Gabriel FERNANDEZ wrote: > sti SoCs PCIe IPs are built around DesignWare IP Core. > But in these SoCs, PCIe IP doesn't support IO. > By default, when no IO space is provided, a default one is assigned. > > Add an empty IO resource to the bus, and disable IO by

[PATCH 5/5] PCI: st: disable IO support

2014-12-17 Thread Gabriel FERNANDEZ
sti SoCs PCIe IPs are built around DesignWare IP Core. But in these SoCs, PCIe IP doesn't support IO. By default, when no IO space is provided, a default one is assigned. Add an empty IO resource to the bus, and disable IO by default. Signed-off-by: Fabrice Gasnier ---

[PATCH 5/5] PCI: st: disable IO support

2014-12-17 Thread Gabriel FERNANDEZ
sti SoCs PCIe IPs are built around DesignWare IP Core. But in these SoCs, PCIe IP doesn't support IO. By default, when no IO space is provided, a default one is assigned. Add an empty IO resource to the bus, and disable IO by default. Signed-off-by: Fabrice Gasnier fabrice.gasn...@st.com ---

Re: [PATCH 5/5] PCI: st: disable IO support

2014-12-17 Thread One Thousand Gnomes
On Wed, 17 Dec 2014 11:34:46 +0100 Gabriel FERNANDEZ gabriel.fernan...@st.com wrote: sti SoCs PCIe IPs are built around DesignWare IP Core. But in these SoCs, PCIe IP doesn't support IO. By default, when no IO space is provided, a default one is assigned. Add an empty IO resource to the