Re: [PATCH 5/5] x86, perf: Avoid context switching LBR_INFO when not needed

On Tue, Oct 20, 2015 at 11:46:37AM -0700, Andi Kleen wrote: > +++ b/arch/x86/kernel/cpu/perf_event_intel.c > @@ -2844,7 +2844,7 @@ static void intel_pmu_cpu_starting(int cpu) > /* >* Deal with CPUs that don't clear their LBRs on power-up. >*/ > - intel_pmu_lbr_reset(); >

Re: [PATCH 5/5] x86, perf: Avoid context switching LBR_INFO when not needed

On Tue, Oct 20, 2015 at 11:46:37AM -0700, Andi Kleen wrote: > +++ b/arch/x86/kernel/cpu/perf_event_intel.c > @@ -2844,7 +2844,7 @@ static void intel_pmu_cpu_starting(int cpu) > /* >* Deal with CPUs that don't clear their LBRs on power-up. >*/ > - intel_pmu_lbr_reset(); >

[PATCH 5/5] x86, perf: Avoid context switching LBR_INFO when not needed

From: Andi Kleen We context switch LBRs in call stack mode. Currently LBR_INFO was also context switched, but we normally don't need that in call stack mode. Make the context switch check the NO_CYCLES|NO_FLAGS event flags that were earlier added, and if set avoid writing the LBR_INFO MSRs

[PATCH 5/5] x86, perf: Avoid context switching LBR_INFO when not needed

From: Andi Kleen We context switch LBRs in call stack mode. Currently LBR_INFO was also context switched, but we normally don't need that in call stack mode. Make the context switch check the NO_CYCLES|NO_FLAGS event flags that were earlier added, and if set avoid writing