To: linux-kernel@vger.kernel.org; de...@acpica.org; Natarajan,
> > Janakarajan ; linux-
> > a...@vger.kernel.org; linux...@vger.kernel.org
> > Cc: Ghannam, Yazen ; l...@kernel.org;
> > viresh.ku...@linaro.org; Moore, Robert
> > ; Schmauss, Erik ;
> > r...@rjwysocki.n
g; de...@acpica.org; Natarajan, Janakarajan
> > ; linux-
> > a...@vger.kernel.org; linux...@vger.kernel.org
> > Cc: Ghannam, Yazen ; l...@kernel.org;
> > viresh.ku...@linaro.org; Moore, Robert
> > ; Schmauss, Erik ;
> > r...@rjwysocki.net
> > Subject: Re: [PATCH
@vger.kernel.org
> Cc: Ghannam, Yazen ; l...@kernel.org;
> viresh.ku...@linaro.org; Moore, Robert
> ; Schmauss, Erik ;
> r...@rjwysocki.net
> Subject: Re: [PATCH 5/6] acpi/cppc: Add support for optional CPPC registers
>
> On Fri, 2019-03-22 at 20:26 +, Natarajan,
On Fri, 2019-03-22 at 20:26 +, Natarajan, Janakarajan wrote:
> From: Yazen Ghannam
>
> Newer AMD processors support a subset of the optional CPPC registers.
> Create show, store and helper routines for supported CPPC registers.
>
> Signed-off-by: Yazen Ghannam
> [ carved out into a patch,
From: Yazen Ghannam
Newer AMD processors support a subset of the optional CPPC registers.
Create show, store and helper routines for supported CPPC registers.
Signed-off-by: Yazen Ghannam
[ carved out into a patch, cleaned up, productized ]
Signed-off-by: Janakarajan Natarajan
---
5 matches
Mail list logo