On Sat, 22 Feb 2014 07:41:26 Benjamin Herrenschmidt wrote:
> On Fri, 2014-02-21 at 15:33 +0100, Arnd Bergmann wrote:
[...]
>
> Should we (provided it's possible in HW) create two ranges instead ? One
> covering RAM and one covering MSIs ? To avoid stray DMAs whacking random
> HW registers in
On Sat, 22 Feb 2014 07:41:26 Benjamin Herrenschmidt wrote:
On Fri, 2014-02-21 at 15:33 +0100, Arnd Bergmann wrote:
[...]
Should we (provided it's possible in HW) create two ranges instead ? One
covering RAM and one covering MSIs ? To avoid stray DMAs whacking random
HW registers in the
On Friday 21 February 2014, Benjamin Herrenschmidt wrote:
> On Fri, 2014-02-21 at 15:33 +0100, Arnd Bergmann wrote:
>
> > > @@ -242,8 +264,10 @@
> > > ranges = <0x0200 0x 0x8000 0x0110
> > > 0x8000 0x0 0x8000
> > >
On Fri, 2014-02-21 at 15:33 +0100, Arnd Bergmann wrote:
> > @@ -242,8 +264,10 @@
> > ranges = <0x0200 0x 0x8000 0x0110
> > 0x8000 0x0 0x8000
> > 0x0100 0x00x00x0140
> > 0x00x0
On Friday 21 February 2014 17:31:33 Alistair Popple wrote:
>
> + HSTA0: hsta@31e {
> + compatible = "ibm,476gtr-hsta-msi", "ibm,hsta-msi";
> + reg = <0x310 0x000e 0x0 0xf0>;
> + interrupt-parent = <>;
> +
On Fri, 2014-02-21 at 15:33 +0100, Arnd Bergmann wrote:
@@ -242,8 +264,10 @@
ranges = 0x0200 0x 0x8000 0x0110
0x8000 0x0 0x8000
0x0100 0x00x00x0140
0x00x0 0x0001;
-
On Friday 21 February 2014, Benjamin Herrenschmidt wrote:
On Fri, 2014-02-21 at 15:33 +0100, Arnd Bergmann wrote:
@@ -242,8 +264,10 @@
ranges = 0x0200 0x 0x8000 0x0110
0x8000 0x0 0x8000
0x0100 0x0
On Friday 21 February 2014 17:31:33 Alistair Popple wrote:
+ HSTA0: hsta@31e {
+ compatible = ibm,476gtr-hsta-msi, ibm,hsta-msi;
+ reg = 0x310 0x000e 0x0 0xf0;
+ interrupt-parent = MPIC;
+
The PPC476GTR SoC supports message signalled interrupts (MSI) by writing
to special addresses within the High Speed Transfer Assist (HSTA) module.
This patch adds support for PCI MSI with a new system device. The DMA
window is also updated to allow access to the entire 42-bit address range
to
The PPC476GTR SoC supports message signalled interrupts (MSI) by writing
to special addresses within the High Speed Transfer Assist (HSTA) module.
This patch adds support for PCI MSI with a new system device. The DMA
window is also updated to allow access to the entire 42-bit address range
to
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