On Fri, Mar 21, 2014 at 2:25 PM, Sasha Levin wrote:
> On 03/21/2014 04:07 PM, Bjorn Helgaas wrote:
>>
>> I think I figured out what the problem is. In virtio_pci__init(), we
>> allocate some address space with pci_get_io_space_block(), save its
>> address in vpci->mmio_addr, and hook that
On 03/21/2014 04:07 PM, Bjorn Helgaas wrote:
I think I figured out what the problem is. In virtio_pci__init(), we
allocate some address space with pci_get_io_space_block(), save its
address in vpci->mmio_addr, and hook that address space up to
virtio_pci__io_mmio_callback with
[+cc kvm list]
On Wed, Mar 19, 2014 at 7:32 PM, Ming Lei wrote:
> On Thu, Mar 20, 2014 at 12:45 AM, Bjorn Helgaas wrote:
>> On Tue, Mar 18, 2014 at 10:52 PM, Ming Lei wrote:
>>> Hi,
>>>
>>> Looks Sasha fixed the problem in lkvm tool[1].
>>>
>>> Sasha, looks we both saw the problem, but from
[+cc kvm list]
On Wed, Mar 19, 2014 at 7:32 PM, Ming Lei tom.leim...@gmail.com wrote:
On Thu, Mar 20, 2014 at 12:45 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Tue, Mar 18, 2014 at 10:52 PM, Ming Lei tom.leim...@gmail.com wrote:
Hi,
Looks Sasha fixed the problem in lkvm tool[1].
Sasha,
On 03/21/2014 04:07 PM, Bjorn Helgaas wrote:
I think I figured out what the problem is. In virtio_pci__init(), we
allocate some address space with pci_get_io_space_block(), save its
address in vpci-mmio_addr, and hook that address space up to
virtio_pci__io_mmio_callback with
On Fri, Mar 21, 2014 at 2:25 PM, Sasha Levin sasha.le...@oracle.com wrote:
On 03/21/2014 04:07 PM, Bjorn Helgaas wrote:
I think I figured out what the problem is. In virtio_pci__init(), we
allocate some address space with pci_get_io_space_block(), save its
address in vpci-mmio_addr, and hook
On Thu, Mar 20, 2014 at 12:45 AM, Bjorn Helgaas wrote:
> On Tue, Mar 18, 2014 at 10:52 PM, Ming Lei wrote:
>> Hi,
>>
>> Looks Sasha fixed the problem in lkvm tool[1].
>>
>> Sasha, looks we both saw the problem, but from technical
>> view, I am wondering if the fix is correct, because PCI spec.
On Wed, Mar 19, 2014 at 12:54 PM, Bjorn Helgaas wrote:
> [+cc Ming, Rusty, Pekka, Sasha]
> ...
> I plan to replace this patch with the following, which only sets
> IORESOURCE_UNSET when we already have been clearing the bus region start
> address. (This probably should have been a separate patch
On 03/19/2014 05:16 PM, Bjorn Helgaas wrote:
On Wed, Mar 19, 2014 at 12:54 PM, Bjorn Helgaas wrote:
>[+cc Ming, Rusty, Pekka, Sasha]
>...
>I plan to replace this patch with the following, which only sets
>IORESOURCE_UNSET when we already have been clearing the bus region start
>address. (This
[+cc Ming, Rusty, Pekka, Sasha]
On Wed, Feb 26, 2014 at 12:37:57PM -0700, Bjorn Helgaas wrote:
> Don't rely on BAR contents when the command register says the BAR is
> disabled.
>
> If we receive a PCI device from firmware (or a hot-added device that was
> just powered up) with the MEMORY or IO
On Tue, Mar 18, 2014 at 10:52 PM, Ming Lei wrote:
> Hi,
>
> Looks Sasha fixed the problem in lkvm tool[1].
>
> Sasha, looks we both saw the problem, but from technical
> view, I am wondering if the fix is correct, because PCI spec.
> requires that the IO/MMIO bits in COMMAND register should
> be
On Tue, Mar 18, 2014 at 10:52 PM, Ming Lei tom.leim...@gmail.com wrote:
Hi,
Looks Sasha fixed the problem in lkvm tool[1].
Sasha, looks we both saw the problem, but from technical
view, I am wondering if the fix is correct, because PCI spec.
requires that the IO/MMIO bits in COMMAND
[+cc Ming, Rusty, Pekka, Sasha]
On Wed, Feb 26, 2014 at 12:37:57PM -0700, Bjorn Helgaas wrote:
Don't rely on BAR contents when the command register says the BAR is
disabled.
If we receive a PCI device from firmware (or a hot-added device that was
just powered up) with the MEMORY or IO
On 03/19/2014 05:16 PM, Bjorn Helgaas wrote:
On Wed, Mar 19, 2014 at 12:54 PM, Bjorn Helgaasbhelg...@google.com wrote:
[+cc Ming, Rusty, Pekka, Sasha]
...
I plan to replace this patch with the following, which only sets
IORESOURCE_UNSET when we already have been clearing the bus region start
On Wed, Mar 19, 2014 at 12:54 PM, Bjorn Helgaas bhelg...@google.com wrote:
[+cc Ming, Rusty, Pekka, Sasha]
...
I plan to replace this patch with the following, which only sets
IORESOURCE_UNSET when we already have been clearing the bus region start
address. (This probably should have been a
On Thu, Mar 20, 2014 at 12:45 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Tue, Mar 18, 2014 at 10:52 PM, Ming Lei tom.leim...@gmail.com wrote:
Hi,
Looks Sasha fixed the problem in lkvm tool[1].
Sasha, looks we both saw the problem, but from technical
view, I am wondering if the fix is
Hi,
Looks Sasha fixed the problem in lkvm tool[1].
Sasha, looks we both saw the problem, but from technical
view, I am wondering if the fix is correct, because PCI spec.
requires that the IO/MMIO bits in COMMAND register should
be cleared after reset, maybe there are some potential problem
in
On Tue, Mar 18, 2014 at 8:27 AM, Bjorn Helgaas wrote:
> On Fri, Mar 14, 2014 at 09:48:35AM +0800, Ming Lei wrote:
>> On Fri, Mar 14, 2014 at 12:08 AM, Bjorn Helgaas wrote:
>> > On Thu, Mar 13, 2014 at 2:51 AM, Ming Lei wrote:
>> >> Hi Bjorn,
>> >>
>> >> I found this patch broke virtio-pci
On Tue, Mar 18, 2014 at 8:27 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Fri, Mar 14, 2014 at 09:48:35AM +0800, Ming Lei wrote:
On Fri, Mar 14, 2014 at 12:08 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Thu, Mar 13, 2014 at 2:51 AM, Ming Lei tom.leim...@gmail.com wrote:
Hi Bjorn,
Hi,
Looks Sasha fixed the problem in lkvm tool[1].
Sasha, looks we both saw the problem, but from technical
view, I am wondering if the fix is correct, because PCI spec.
requires that the IO/MMIO bits in COMMAND register should
be cleared after reset, maybe there are some potential problem
in
On Fri, Mar 14, 2014 at 09:48:35AM +0800, Ming Lei wrote:
> On Fri, Mar 14, 2014 at 12:08 AM, Bjorn Helgaas wrote:
> > On Thu, Mar 13, 2014 at 2:51 AM, Ming Lei wrote:
> >> Hi Bjorn,
> >>
> >> I found this patch broke virtio-pci devices.
> >
> > Thanks a lot for testing this.
> >
> >> On Thu,
On Fri, Mar 14, 2014 at 09:48:35AM +0800, Ming Lei wrote:
On Fri, Mar 14, 2014 at 12:08 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Thu, Mar 13, 2014 at 2:51 AM, Ming Lei tom.leim...@gmail.com wrote:
Hi Bjorn,
I found this patch broke virtio-pci devices.
Thanks a lot for testing
On Fri, Mar 14, 2014 at 12:08 AM, Bjorn Helgaas wrote:
> On Thu, Mar 13, 2014 at 2:51 AM, Ming Lei wrote:
>> Hi Bjorn,
>>
>> I found this patch broke virtio-pci devices.
>
> Thanks a lot for testing this.
>
>> On Thu, Feb 27, 2014 at 3:37 AM, Bjorn Helgaas wrote:
>>> Don't rely on BAR contents
On Thu, Mar 13, 2014 at 2:51 AM, Ming Lei wrote:
> Hi Bjorn,
>
> I found this patch broke virtio-pci devices.
Thanks a lot for testing this.
> On Thu, Feb 27, 2014 at 3:37 AM, Bjorn Helgaas wrote:
>> Don't rely on BAR contents when the command register says the BAR is
>> disabled.
>>
>> If we
Hi Bjorn,
I found this patch broke virtio-pci devices.
On Thu, Feb 27, 2014 at 3:37 AM, Bjorn Helgaas wrote:
> Don't rely on BAR contents when the command register says the BAR is
> disabled.
>
> If we receive a PCI device from firmware (or a hot-added device that was
> just powered up) with
Hi Bjorn,
I found this patch broke virtio-pci devices.
On Thu, Feb 27, 2014 at 3:37 AM, Bjorn Helgaas bhelg...@google.com wrote:
Don't rely on BAR contents when the command register says the BAR is
disabled.
If we receive a PCI device from firmware (or a hot-added device that was
just
On Thu, Mar 13, 2014 at 2:51 AM, Ming Lei tom.leim...@gmail.com wrote:
Hi Bjorn,
I found this patch broke virtio-pci devices.
Thanks a lot for testing this.
On Thu, Feb 27, 2014 at 3:37 AM, Bjorn Helgaas bhelg...@google.com wrote:
Don't rely on BAR contents when the command register says
On Fri, Mar 14, 2014 at 12:08 AM, Bjorn Helgaas bhelg...@google.com wrote:
On Thu, Mar 13, 2014 at 2:51 AM, Ming Lei tom.leim...@gmail.com wrote:
Hi Bjorn,
I found this patch broke virtio-pci devices.
Thanks a lot for testing this.
On Thu, Feb 27, 2014 at 3:37 AM, Bjorn Helgaas
Don't rely on BAR contents when the command register says the BAR is
disabled.
If we receive a PCI device from firmware (or a hot-added device that was
just powered up) with the MEMORY or IO enable bits in the PCI command
register cleared, there's no reason to believe the BARs contain valid
Don't rely on BAR contents when the command register says the BAR is
disabled.
If we receive a PCI device from firmware (or a hot-added device that was
just powered up) with the MEMORY or IO enable bits in the PCI command
register cleared, there's no reason to believe the BARs contain valid
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