Hi Adrian,
On Mon, 3 Jun 2019 at 21:03, Adrian Hunter wrote:
>
> On 20/05/19 1:12 PM, Baolin Wang wrote:
> > Set the PHY DLL delay for each timing mode, which is used to sample the
> > clock
> > accurately and make the clock more stable.
> >
> > Signed-off-by: Baolin Wang
>
> One comment,
On 20/05/19 1:12 PM, Baolin Wang wrote:
> Set the PHY DLL delay for each timing mode, which is used to sample the clock
> accurately and make the clock more stable.
>
> Signed-off-by: Baolin Wang
One comment, nevertheless:
Acked-by: Adrian Hunter
> ---
> drivers/mmc/host/sdhci-sprd.c | 51
Set the PHY DLL delay for each timing mode, which is used to sample the clock
accurately and make the clock more stable.
Signed-off-by: Baolin Wang
---
drivers/mmc/host/sdhci-sprd.c | 51 +
1 file changed, 51 insertions(+)
diff --git
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