[PATCH AUTOSEL for 4.9 228/293] net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock

From: Martin Blumenstingl [ Upstream commit fb7d38a70e1d8ffd54f7a7464dcc4889d7e490ad ] On Meson8b the only valid input clock is MPLL2. The bootloader configures that to run at 52394Hz which cannot be divided evenly down to 125MHz using the m250_div clock.

[PATCH AUTOSEL for 4.9 228/293] net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock

From: Martin Blumenstingl [ Upstream commit fb7d38a70e1d8ffd54f7a7464dcc4889d7e490ad ] On Meson8b the only valid input clock is MPLL2. The bootloader configures that to run at 52394Hz which cannot be divided evenly down to 125MHz using the m250_div clock. Currently the common clock