On 08/11/2016 10:58 AM, Andreas Werner wrote:
On Thu, Aug 11, 2016 at 10:45:00AM +0200, Oliver Hartkopp wrote:
When you still have the possibility to change the IP core I would suggest to
create some kind of 16/32 bit value which you can pass to the CAN controller
along with the CAN frame
On 08/11/2016 10:58 AM, Andreas Werner wrote:
On Thu, Aug 11, 2016 at 10:45:00AM +0200, Oliver Hartkopp wrote:
When you still have the possibility to change the IP core I would suggest to
create some kind of 16/32 bit value which you can pass to the CAN controller
along with the CAN frame
On Thu, Aug 11, 2016 at 10:45:00AM +0200, Oliver Hartkopp wrote:
> On 08/11/2016 09:14 AM, Andreas Werner wrote:
> >On Wed, Aug 10, 2016 at 10:28:45PM +0200, Oliver Hartkopp wrote:
>
> >>Just check 'git grep IFF_ECHO'. Even grcan.c and janz-ican3.c have IFF_ECHO
> >>set - but implement it in a
On Thu, Aug 11, 2016 at 10:45:00AM +0200, Oliver Hartkopp wrote:
> On 08/11/2016 09:14 AM, Andreas Werner wrote:
> >On Wed, Aug 10, 2016 at 10:28:45PM +0200, Oliver Hartkopp wrote:
>
> >>Just check 'git grep IFF_ECHO'. Even grcan.c and janz-ican3.c have IFF_ECHO
> >>set - but implement it in a
On 08/11/2016 09:14 AM, Andreas Werner wrote:
On Wed, Aug 10, 2016 at 10:28:45PM +0200, Oliver Hartkopp wrote:
Just check 'git grep IFF_ECHO'. Even grcan.c and janz-ican3.c have IFF_ECHO
set - but implement it in a different way without using the provided
machanism from dev.c .
Ok I am
On 08/11/2016 09:14 AM, Andreas Werner wrote:
On Wed, Aug 10, 2016 at 10:28:45PM +0200, Oliver Hartkopp wrote:
Just check 'git grep IFF_ECHO'. Even grcan.c and janz-ican3.c have IFF_ECHO
set - but implement it in a different way without using the provided
machanism from dev.c .
Ok I am
On Wed, Aug 10, 2016 at 10:28:45PM +0200, Oliver Hartkopp wrote:
> Hi Andreas,
>
> On 08/09/2016 08:10 AM, Andreas Werner wrote:
> >On Mon, Aug 08, 2016 at 04:35:34PM +0200, Wolfgang Grandegger wrote:
>
> >>You specify here one echo_skb but it's not used anywhere. Local loopback
>
On Wed, Aug 10, 2016 at 10:28:45PM +0200, Oliver Hartkopp wrote:
> Hi Andreas,
>
> On 08/09/2016 08:10 AM, Andreas Werner wrote:
> >On Mon, Aug 08, 2016 at 04:35:34PM +0200, Wolfgang Grandegger wrote:
>
> >>You specify here one echo_skb but it's not used anywhere. Local loopback
>
Hi Andreas,
On 08/09/2016 08:10 AM, Andreas Werner wrote:
On Mon, Aug 08, 2016 at 04:35:34PM +0200, Wolfgang Grandegger wrote:
You specify here one echo_skb but it's not used anywhere. Local loopback
seems not to be implemented.
Agree with you, will set it to "0".
No, the local loopback
Hi Andreas,
On 08/09/2016 08:10 AM, Andreas Werner wrote:
On Mon, Aug 08, 2016 at 04:35:34PM +0200, Wolfgang Grandegger wrote:
You specify here one echo_skb but it's not used anywhere. Local loopback
seems not to be implemented.
Agree with you, will set it to "0".
No, the local loopback
Am 09.08.2016 um 08:10 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 04:35:34PM +0200, Wolfgang Grandegger wrote:
Am 08.08.2016 um 16:05 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 02:28:39PM +0200, Wolfgang Grandegger wrote:
---snip---
+
+ ndev = alloc_candev(sizeof(struct
Am 09.08.2016 um 08:10 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 04:35:34PM +0200, Wolfgang Grandegger wrote:
Am 08.08.2016 um 16:05 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 02:28:39PM +0200, Wolfgang Grandegger wrote:
---snip---
+
+ ndev = alloc_candev(sizeof(struct
Hi Andreas,
> Subject: [PATCH RESEND] net: can: Introduce MEN 16Z192-00 CAN controller
> driver
>
> This CAN Controller is found on MEN Chameleon FPGAs.
>
> The driver/device supports the CAN2.0 specification.
> There are 255 RX and 255 Tx buffer within the IP. The poi
Hi Andreas,
> Subject: [PATCH RESEND] net: can: Introduce MEN 16Z192-00 CAN controller
> driver
>
> This CAN Controller is found on MEN Chameleon FPGAs.
>
> The driver/device supports the CAN2.0 specification.
> There are 255 RX and 255 Tx buffer within the IP. The poi
On Mon, Aug 08, 2016 at 08:23:55PM -0700, Benjamin Poirier wrote:
> On 2016/08/08 09:26, Andreas Werner wrote:
> [...]
> > > > +
> > > > + if (cf->can_dlc > 0)
> > > > + data[0] = be32_to_cpup((__be32 *)(cf->data));
> > > > + if (cf->can_dlc > 3)
> > > > +
On Mon, Aug 08, 2016 at 08:23:55PM -0700, Benjamin Poirier wrote:
> On 2016/08/08 09:26, Andreas Werner wrote:
> [...]
> > > > +
> > > > + if (cf->can_dlc > 0)
> > > > + data[0] = be32_to_cpup((__be32 *)(cf->data));
> > > > + if (cf->can_dlc > 3)
> > > > +
On Mon, Aug 08, 2016 at 04:35:34PM +0200, Wolfgang Grandegger wrote:
> Am 08.08.2016 um 16:05 schrieb Andreas Werner:
> >On Mon, Aug 08, 2016 at 02:28:39PM +0200, Wolfgang Grandegger wrote:
> >>Hello,
> >>
> >>Am 08.08.2016 um 13:39 schrieb Andreas Werner:
> >>>On Mon, Aug 08, 2016 at 11:27:25AM
On Mon, Aug 08, 2016 at 04:35:34PM +0200, Wolfgang Grandegger wrote:
> Am 08.08.2016 um 16:05 schrieb Andreas Werner:
> >On Mon, Aug 08, 2016 at 02:28:39PM +0200, Wolfgang Grandegger wrote:
> >>Hello,
> >>
> >>Am 08.08.2016 um 13:39 schrieb Andreas Werner:
> >>>On Mon, Aug 08, 2016 at 11:27:25AM
On 2016/08/08 09:26, Andreas Werner wrote:
[...]
> > > +
> > > + if (cf->can_dlc > 0)
> > > + data[0] = be32_to_cpup((__be32 *)(cf->data));
> > > + if (cf->can_dlc > 3)
> > > + data[1] = be32_to_cpup((__be32 *)(cf->data + 4));
> > > +
> > > + writel(id, _buf->can_id);
> > > +
On 2016/08/08 09:26, Andreas Werner wrote:
[...]
> > > +
> > > + if (cf->can_dlc > 0)
> > > + data[0] = be32_to_cpup((__be32 *)(cf->data));
> > > + if (cf->can_dlc > 3)
> > > + data[1] = be32_to_cpup((__be32 *)(cf->data + 4));
> > > +
> > > + writel(id, _buf->can_id);
> > > +
Am 08.08.2016 um 16:05 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 02:28:39PM +0200, Wolfgang Grandegger wrote:
Hello,
Am 08.08.2016 um 13:39 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 11:27:25AM +0200, Wolfgang Grandegger wrote:
Hello Andreas,
a first quick review
Am
Am 08.08.2016 um 16:05 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 02:28:39PM +0200, Wolfgang Grandegger wrote:
Hello,
Am 08.08.2016 um 13:39 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 11:27:25AM +0200, Wolfgang Grandegger wrote:
Hello Andreas,
a first quick review
Am
On Mon, Aug 08, 2016 at 03:06:33PM +0200, Kurt Van Dijck wrote:
>
> --- Original message ---
> > Date: Mon, 8 Aug 2016 14:28:39 +0200
> > From: Wolfgang Grandegger
> >
> [...]
> > >>>+
> > >>>+if (!(cf->can_id & CAN_RTR_FLAG)) {
> > >>>+
On Mon, Aug 08, 2016 at 03:06:33PM +0200, Kurt Van Dijck wrote:
>
> --- Original message ---
> > Date: Mon, 8 Aug 2016 14:28:39 +0200
> > From: Wolfgang Grandegger
> >
> [...]
> > >>>+
> > >>>+if (!(cf->can_id & CAN_RTR_FLAG)) {
> > >>>+writel(data[0],
On Mon, Aug 08, 2016 at 02:28:39PM +0200, Wolfgang Grandegger wrote:
> Hello,
>
> Am 08.08.2016 um 13:39 schrieb Andreas Werner:
> >On Mon, Aug 08, 2016 at 11:27:25AM +0200, Wolfgang Grandegger wrote:
> >>Hello Andreas,
> >>
> >>a first quick review
> >>
> >>Am 26.07.2016 um 11:16 schrieb
On Mon, Aug 08, 2016 at 02:28:39PM +0200, Wolfgang Grandegger wrote:
> Hello,
>
> Am 08.08.2016 um 13:39 schrieb Andreas Werner:
> >On Mon, Aug 08, 2016 at 11:27:25AM +0200, Wolfgang Grandegger wrote:
> >>Hello Andreas,
> >>
> >>a first quick review
> >>
> >>Am 26.07.2016 um 11:16 schrieb
--- Original message ---
> Date: Mon, 8 Aug 2016 14:28:39 +0200
> From: Wolfgang Grandegger
>
[...]
> >>>+
> >>>+ if (!(cf->can_id & CAN_RTR_FLAG)) {
> >>>+ writel(data[0], _buf->data[0]);
> >>>+ writel(data[1], _buf->data[1]);
> >>
> >>Why do you not
--- Original message ---
> Date: Mon, 8 Aug 2016 14:28:39 +0200
> From: Wolfgang Grandegger
>
[...]
> >>>+
> >>>+ if (!(cf->can_id & CAN_RTR_FLAG)) {
> >>>+ writel(data[0], _buf->data[0]);
> >>>+ writel(data[1], _buf->data[1]);
> >>
> >>Why do you not check cf->can_dlc here
Hello,
Am 08.08.2016 um 13:39 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 11:27:25AM +0200, Wolfgang Grandegger wrote:
Hello Andreas,
a first quick review
Am 26.07.2016 um 11:16 schrieb Andreas Werner:
This CAN Controller is found on MEN Chameleon FPGAs.
The driver/device supports
Hello,
Am 08.08.2016 um 13:39 schrieb Andreas Werner:
On Mon, Aug 08, 2016 at 11:27:25AM +0200, Wolfgang Grandegger wrote:
Hello Andreas,
a first quick review
Am 26.07.2016 um 11:16 schrieb Andreas Werner:
This CAN Controller is found on MEN Chameleon FPGAs.
The driver/device supports
On Mon, Aug 08, 2016 at 11:27:25AM +0200, Wolfgang Grandegger wrote:
> Hello Andreas,
>
> a first quick review
>
> Am 26.07.2016 um 11:16 schrieb Andreas Werner:
> >This CAN Controller is found on MEN Chameleon FPGAs.
> >
> >The driver/device supports the CAN2.0 specification.
> >There are
On Mon, Aug 08, 2016 at 11:27:25AM +0200, Wolfgang Grandegger wrote:
> Hello Andreas,
>
> a first quick review
>
> Am 26.07.2016 um 11:16 schrieb Andreas Werner:
> >This CAN Controller is found on MEN Chameleon FPGAs.
> >
> >The driver/device supports the CAN2.0 specification.
> >There are
Hello Andreas,
a first quick review
Am 26.07.2016 um 11:16 schrieb Andreas Werner:
This CAN Controller is found on MEN Chameleon FPGAs.
The driver/device supports the CAN2.0 specification.
There are 255 RX and 255 Tx buffer within the IP. The
pointer for the buffer are handled by HW to
Hello Andreas,
a first quick review
Am 26.07.2016 um 11:16 schrieb Andreas Werner:
This CAN Controller is found on MEN Chameleon FPGAs.
The driver/device supports the CAN2.0 specification.
There are 255 RX and 255 Tx buffer within the IP. The
pointer for the buffer are handled by HW to
On Sun, Aug 07, 2016 at 08:58:14PM -0700, Benjamin Poirier wrote:
> On 2016/07/26 11:16, Andreas Werner wrote:
> [...]
> > +
> > + /* Lock for CTL_BTR register access.
> > +* This register combines bittiming bits
> > +* and the operation mode bits.
> > +* It is also used for bit
On Sun, Aug 07, 2016 at 08:58:14PM -0700, Benjamin Poirier wrote:
> On 2016/07/26 11:16, Andreas Werner wrote:
> [...]
> > +
> > + /* Lock for CTL_BTR register access.
> > +* This register combines bittiming bits
> > +* and the operation mode bits.
> > +* It is also used for bit
On 2016/07/26 11:16, Andreas Werner wrote:
[...]
> +
> + /* Lock for CTL_BTR register access.
> + * This register combines bittiming bits
> + * and the operation mode bits.
> + * It is also used for bit r/m/w access
> + * to all registers.
> + */
> + spinlock_t
On 2016/07/26 11:16, Andreas Werner wrote:
[...]
> +
> + /* Lock for CTL_BTR register access.
> + * This register combines bittiming bits
> + * and the operation mode bits.
> + * It is also used for bit r/m/w access
> + * to all registers.
> + */
> + spinlock_t
This CAN Controller is found on MEN Chameleon FPGAs.
The driver/device supports the CAN2.0 specification.
There are 255 RX and 255 Tx buffer within the IP. The
pointer for the buffer are handled by HW to make the
access from within the driver as simple as possible.
The driver also supports
This CAN Controller is found on MEN Chameleon FPGAs.
The driver/device supports the CAN2.0 specification.
There are 255 RX and 255 Tx buffer within the IP. The
pointer for the buffer are handled by HW to make the
access from within the driver as simple as possible.
The driver also supports
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