[PATCH RFC 07/18] staging: vchiq-core: get rid of is_master distinction

VCHIQ bulk transfers are what most people call DMA transfers. The CPU sends a list of physical addresses to the VideoCore which then access the memory directly without the need for CPU interaction. With this setup we call the CPU the "slave" and the VideoCore the "master". There seems to be an

[PATCH RFC 07/18] staging: vchiq-core: get rid of is_master distinction

VCHIQ bulk transfers are what most people call DMA transfers. The CPU sends a list of physical addresses to the VideoCore which then access the memory directly without the need for CPU interaction. With this setup we call the CPU the "slave" and the VideoCore the "master". There seems to be an