Thank you Pierre.
All your comments are addressed in V4.
skylake_nau8825_resume_post() is in fact unnecessary as my test shows
no difference if we do the FLL setup in skylake_nau8825_trigger().
patch is coming...
wt., 8 wrz 2020 o 22:59 Pierre-Louis Bossart
napisał(a):
>
> Sorry, I couldn't res
Sorry, I couldn't resist adding three more comments to improve further:
-static int skylake_nau8825_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
+static int skylake_nau8825_trigger(struct snd_pcm_substream *substream, int
cmd)
{
struct snd_s
Since 256xFS clocks cannot be generated by SKL, the NAU8825 is
configured to re-generate its system clock from the BCLK using the
FLL. The link is configured to use a 48kHz frame rate, and 24 bits in
25-bit slot. The SSP configuration is extracted from NHLT settings and
not dynamically changed. Lis
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