On 11/22/2015 9:19 AM, Yuval Mintz wrote:
+void hns_rcbv2_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask)
+{
+ u32 int_mask_en = !!mask;
+
+ if (flag & RCB_INT_FLAG_TX)
+ dsaf_write_dev(q, RCB_RING_INTMSK_TXWL_REG,
int_mask_en);
+
+ if (flag &
On 11/22/2015 9:19 AM, Yuval Mintz wrote:
+void hns_rcbv2_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask)
+{
+ u32 int_mask_en = !!mask;
+
+ if (flag & RCB_INT_FLAG_TX)
+ dsaf_write_dev(q, RCB_RING_INTMSK_TXWL_REG,
int_mask_en);
+
+ if (flag &
> +void hns_rcbv2_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask)
> +{
> + u32 int_mask_en = !!mask;
> +
> + if (flag & RCB_INT_FLAG_TX)
> + dsaf_write_dev(q, RCB_RING_INTMSK_TXWL_REG,
> int_mask_en);
> +
> + if (flag & RCB_INT_FLAG_RX)
> +
> +void hns_rcbv2_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask)
> +{
> + u32 int_mask_en = !!mask;
> +
> + if (flag & RCB_INT_FLAG_TX)
> + dsaf_write_dev(q, RCB_RING_INTMSK_TXWL_REG,
> int_mask_en);
> +
> + if (flag & RCB_INT_FLAG_RX)
> +
This patchset adds support of Hisilicon Hip06 SoC to the existing HNS
ethernet driver.
The changes in the driver are mainly due to changes in the DMA
descriptor provided by the Hip06 ethernet hardware. These changes
need to co-exist with already present Hip05 DMA descriptor and its
operating
This patchset adds support of Hisilicon Hip06 SoC to the existing HNS
ethernet driver.
The changes in the driver are mainly due to changes in the DMA
descriptor provided by the Hip06 ethernet hardware. These changes
need to co-exist with already present Hip05 DMA descriptor and its
operating
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