Re: [PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-05-16 Thread Stephen Boyd
Quoting Marcin Ziemianowicz (2018-04-29 12:01:11) > When a USB device is connected to the USB host port on the SAM9N12 then > you get "-62" error which seems to indicate USB replies from the device > are timing out. Based on a logic sniffer, I saw the USB bus was running > at half speed. > > The

Re: [PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-05-16 Thread Stephen Boyd
Quoting Marcin Ziemianowicz (2018-04-29 12:01:11) > When a USB device is connected to the USB host port on the SAM9N12 then > you get "-62" error which seems to indicate USB replies from the device > are timing out. Based on a logic sniffer, I saw the USB bus was running > at half speed. > > The

Re: [PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-05-15 Thread Stephen Boyd
Quoting Marcin Ziemianowicz (2018-05-08 21:32:05) > On Mon, Apr 30, 2018 at 07:58:47AM +0200, Boris Brezillon wrote: > > On Sun, 29 Apr 2018 15:01:11 -0400 > > Marcin Ziemianowicz wrote: > > > > > When a USB device is connected to the USB host port on the SAM9N12 then >

Re: [PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-05-15 Thread Stephen Boyd
Quoting Marcin Ziemianowicz (2018-05-08 21:32:05) > On Mon, Apr 30, 2018 at 07:58:47AM +0200, Boris Brezillon wrote: > > On Sun, 29 Apr 2018 15:01:11 -0400 > > Marcin Ziemianowicz wrote: > > > > > When a USB device is connected to the USB host port on the SAM9N12 then > > > you get "-62" error

Re: [PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-05-08 Thread Marcin Ziemianowicz
On Mon, Apr 30, 2018 at 07:58:47AM +0200, Boris Brezillon wrote: > On Sun, 29 Apr 2018 15:01:11 -0400 > Marcin Ziemianowicz wrote: > > > When a USB device is connected to the USB host port on the SAM9N12 then > > you get "-62" error which seems to indicate USB replies

Re: [PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-05-08 Thread Marcin Ziemianowicz
On Mon, Apr 30, 2018 at 07:58:47AM +0200, Boris Brezillon wrote: > On Sun, 29 Apr 2018 15:01:11 -0400 > Marcin Ziemianowicz wrote: > > > When a USB device is connected to the USB host port on the SAM9N12 then > > you get "-62" error which seems to indicate USB replies from the device > > are

Re: [PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-04-29 Thread Boris Brezillon
On Sun, 29 Apr 2018 15:01:11 -0400 Marcin Ziemianowicz wrote: > When a USB device is connected to the USB host port on the SAM9N12 then > you get "-62" error which seems to indicate USB replies from the device > are timing out. Based on a logic sniffer, I saw the USB bus

Re: [PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-04-29 Thread Boris Brezillon
On Sun, 29 Apr 2018 15:01:11 -0400 Marcin Ziemianowicz wrote: > When a USB device is connected to the USB host port on the SAM9N12 then > you get "-62" error which seems to indicate USB replies from the device > are timing out. Based on a logic sniffer, I saw the USB bus was running > at half

[PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-04-29 Thread Marcin Ziemianowicz
When a USB device is connected to the USB host port on the SAM9N12 then you get "-62" error which seems to indicate USB replies from the device are timing out. Based on a logic sniffer, I saw the USB bus was running at half speed. The PLL code uses cached MUL and DIV values which get set in

[PATCH V4] clk: at91: PLL recalc_rate() now using cached MUL and DIV values

2018-04-29 Thread Marcin Ziemianowicz
When a USB device is connected to the USB host port on the SAM9N12 then you get "-62" error which seems to indicate USB replies from the device are timing out. Based on a logic sniffer, I saw the USB bus was running at half speed. The PLL code uses cached MUL and DIV values which get set in