Re: [PATCH V5 1/3] mmc: mmci: add hardware busy timeout feature

2019-09-04 Thread Ludovic BARRE
hi Ulf On 8/26/19 1:39 PM, Ulf Hansson wrote: On Tue, 13 Aug 2019 at 12:00, Ludovic Barre wrote: From: Ludovic Barre In some variants, the data timer starts and decrements when the DPSM enters in Wait_R or Busy state (while data transfer or MMC_RSP_BUSY), and generates a data timeout error

Re: [PATCH V5 1/3] mmc: mmci: add hardware busy timeout feature

2019-08-26 Thread Ulf Hansson
On Tue, 13 Aug 2019 at 12:00, Ludovic Barre wrote: > > From: Ludovic Barre > > In some variants, the data timer starts and decrements > when the DPSM enters in Wait_R or Busy state > (while data transfer or MMC_RSP_BUSY), and generates a > data timeout error if the counter reach 0. I don't quite

[PATCH V5 1/3] mmc: mmci: add hardware busy timeout feature

2019-08-13 Thread Ludovic Barre
From: Ludovic Barre In some variants, the data timer starts and decrements when the DPSM enters in Wait_R or Busy state (while data transfer or MMC_RSP_BUSY), and generates a data timeout error if the counter reach 0. -Define max_busy_timeout (in ms) according to clock. -Set data timer register