Re: [PATCH net-next 1/2] ptp: ptp_clockmatrix: Add wait_for_sys_apll_dpll_lock.

2021-02-12 Thread Vincent Cheng
On Fri, Feb 12, 2021 at 10:31:40AM EST, Richard Cochran wrote: >On Thu, Feb 11, 2021 at 11:38:44PM -0500, vincent.cheng...@renesas.com wrote: > >> +static int wait_for_sys_apll_dpll_lock(struct idtcm *idtcm) >> +{ >> +char *fmt = "%d ms SYS lock timeout: APLL Loss Lock %d DPLL state %d"; >

Re: [PATCH net-next 1/2] ptp: ptp_clockmatrix: Add wait_for_sys_apll_dpll_lock.

2021-02-12 Thread Richard Cochran
On Thu, Feb 11, 2021 at 11:38:44PM -0500, vincent.cheng...@renesas.com wrote: > +static int wait_for_sys_apll_dpll_lock(struct idtcm *idtcm) > +{ > + char *fmt = "%d ms SYS lock timeout: APLL Loss Lock %d DPLL state %d"; Probably you want: const char *fmt > diff --git

[PATCH net-next 1/2] ptp: ptp_clockmatrix: Add wait_for_sys_apll_dpll_lock.

2021-02-11 Thread vincent.cheng.xh
From: Vincent Cheng Part of the device initialization aligns the rising edge of the output clock to the internal 1 PPS clock. If the system APLL and DPLL is not locked, then the alignment will fail and there will be a fixed offset between the internal 1 PPS clock and the output clock. After