Re: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

2021-04-07 Thread Russell King - ARM Linux admin
On Wed, Apr 07, 2021 at 02:44:39PM +0200, Andrew Lunn wrote: > > Intel mgbe is flexible to pair with any PHY. Only Aquantia/Marvell > > multi-gige PHY can do rate adaption right? > > The Marvell/Marvell multi-gige PHY can also do rate > adaptation. Marvell buying Aquantia made naming messy :-( >

Re: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

2021-04-07 Thread Andrew Lunn
> Intel mgbe is flexible to pair with any PHY. Only Aquantia/Marvell > multi-gige PHY can do rate adaption right? The Marvell/Marvell multi-gige PHY can also do rate adaptation. Marvell buying Aquantia made naming messy :-( I should probably use part numbers. > Hence, we still need to take care

RE: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

2021-04-06 Thread Voon, Weifeng
> > The limitation is not on the MAC, PCS or the PHY. For Intel mgbe, the > > overclocking of 2.5 times clock rate to support 2.5G is only able to > > be configured in the BIOS during boot time. Kernel driver has no > > access to modify the clock rate for 1Gbps/2.5G mode. The way to > > determined

Re: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

2021-04-06 Thread Andrew Lunn
> The limitation is not on the MAC, PCS or the PHY. For Intel mgbe, the > overclocking of 2.5 times clock rate to support 2.5G is only able to be > configured in the BIOS during boot time. Kernel driver has no access to > modify the clock rate for 1Gbps/2.5G mode. The way to determined the >

RE: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

2021-04-06 Thread Voon, Weifeng
> > > You have a MAC and an PCS in the stmmac IP block. That then has some > > > sort of SERDES interface, running 1000BaseX, SGMII, SGMII > > > overclocked at 2.5G or 25000BaseX. Connected to the SERDES you have > > > a PHY which converts to copper, giving you 2500BaseT. > > > > > > You said

Re: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

2021-04-05 Thread Andrew Lunn
> > You have a MAC and an PCS in the stmmac IP block. That then has > > some > > sort of SERDES interface, running 1000BaseX, SGMII, SGMII > > overclocked > > at 2.5G or 25000BaseX. Connected to the SERDES you have a PHY > > which > > converts to copper, giving you 2500BaseT. > > > > You said

RE: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

2021-04-05 Thread Sit, Michael Wei Hong
g; hkallwe...@gmail.com > Subject: Re: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for > stmmac > > On Mon, Apr 05, 2021 at 07:29:51PM +0800, Michael Sit Wei Hong > wrote: > > This patchset enables 2.5Gbps speed mode for stmmac. > > Link speed mode is detected and con

Re: [PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

2021-04-05 Thread Andrew Lunn
On Mon, Apr 05, 2021 at 07:29:51PM +0800, Michael Sit Wei Hong wrote: > This patchset enables 2.5Gbps speed mode for stmmac. > Link speed mode is detected and configured at serdes power up sequence. > For 2.5G, we do not use SGMII in-band AN, we check the link speed mode > in the serdes and

[PATCH net-next v2 0/2] Enable 2.5Gbps speed for stmmac

2021-04-05 Thread Michael Sit Wei Hong
This patchset enables 2.5Gbps speed mode for stmmac. Link speed mode is detected and configured at serdes power up sequence. For 2.5G, we do not use SGMII in-band AN, we check the link speed mode in the serdes and disable the in-band AN accordingly. Changes: v1 -> v2 patch 1/2 -Remove MAC