On 6/2/2014 2:16 AM, ABRAHAM, KISHON VIJAY wrote:
Hi,
On Thursday 15 May 2014 09:31 PM, Murali Karicheri wrote:
This phy driver is used by keystone PCI driver. The hw vendor that
provides the phy hw published only registers and their values. So
this driver uses these hard coded values to
On Monday, June 02, 2014 3:17 PM, Kishon Vijay Abraham I wrote:
> On Thursday 15 May 2014 09:31 PM, Murali Karicheri wrote:
> > This phy driver is used by keystone PCI driver. The hw vendor that
> > provides the phy hw published only registers and their values. So
> > this driver uses these hard
Hi,
On Thursday 15 May 2014 09:31 PM, Murali Karicheri wrote:
> This phy driver is used by keystone PCI driver. The hw vendor that
> provides the phy hw published only registers and their values. So
> this driver uses these hard coded values to initialize the phy.
>
> CC: Grant Likely
> CC: Rob
Hi,
On Thursday 15 May 2014 09:31 PM, Murali Karicheri wrote:
This phy driver is used by keystone PCI driver. The hw vendor that
provides the phy hw published only registers and their values. So
this driver uses these hard coded values to initialize the phy.
CC: Grant Likely
On Monday, June 02, 2014 3:17 PM, Kishon Vijay Abraham I wrote:
On Thursday 15 May 2014 09:31 PM, Murali Karicheri wrote:
This phy driver is used by keystone PCI driver. The hw vendor that
provides the phy hw published only registers and their values. So
this driver uses these hard coded
On 6/2/2014 2:16 AM, ABRAHAM, KISHON VIJAY wrote:
Hi,
On Thursday 15 May 2014 09:31 PM, Murali Karicheri wrote:
This phy driver is used by keystone PCI driver. The hw vendor that
provides the phy hw published only registers and their values. So
this driver uses these hard coded values to
On Tuesday 27 May 2014 12:46:54 Murali Karicheri wrote:
> I have checked the register set of the following drivers under
> drivers/phy from the
> master branch (v3.15-rc6) using the registers set available with us
> internally and
> I can't find a match.
>
> phy-exynos5250-sata.c
On 5/23/2014 3:23 PM, Arnd Bergmann wrote:
On Friday 23 May 2014 13:14:00 Murali Karicheri wrote:
On 5/15/2014 12:14 PM, Arnd Bergmann wrote:
On Thursday 15 May 2014 12:01:30 Murali Karicheri wrote:
+static struct serdes_config ks_100mhz_pcie_5gbps_serdes[] = {
+ {0x, 0x0800,
On 5/23/2014 3:23 PM, Arnd Bergmann wrote:
On Friday 23 May 2014 13:14:00 Murali Karicheri wrote:
On 5/15/2014 12:14 PM, Arnd Bergmann wrote:
On Thursday 15 May 2014 12:01:30 Murali Karicheri wrote:
+static struct serdes_config ks_100mhz_pcie_5gbps_serdes[] = {
+ {0x, 0x0800,
On Tuesday 27 May 2014 12:46:54 Murali Karicheri wrote:
I have checked the register set of the following drivers under
drivers/phy from the
master branch (v3.15-rc6) using the registers set available with us
internally and
I can't find a match.
phy-exynos5250-sata.c
On Friday 23 May 2014 13:14:00 Murali Karicheri wrote:
> On 5/15/2014 12:14 PM, Arnd Bergmann wrote:
> > On Thursday 15 May 2014 12:01:30 Murali Karicheri wrote:
> >> +static struct serdes_config ks_100mhz_pcie_5gbps_serdes[] = {
> >> + {0x, 0x0800, 0xff00},
> >> + {0x0060,
On 5/15/2014 12:14 PM, Arnd Bergmann wrote:
On Thursday 15 May 2014 12:01:30 Murali Karicheri wrote:
+static struct serdes_config ks_100mhz_pcie_5gbps_serdes[] = {
+ {0x, 0x0800, 0xff00},
+ {0x0060, 0x00041c5c, 0x00ff},
+ {0x0064, 0x0343c700, 0xff00},
+
On 5/15/2014 12:14 PM, Arnd Bergmann wrote:
On Thursday 15 May 2014 12:01:30 Murali Karicheri wrote:
+static struct serdes_config ks_100mhz_pcie_5gbps_serdes[] = {
+ {0x, 0x0800, 0xff00},
+ {0x0060, 0x00041c5c, 0x00ff},
+ {0x0064, 0x0343c700, 0xff00},
+
On Friday 23 May 2014 13:14:00 Murali Karicheri wrote:
On 5/15/2014 12:14 PM, Arnd Bergmann wrote:
On Thursday 15 May 2014 12:01:30 Murali Karicheri wrote:
+static struct serdes_config ks_100mhz_pcie_5gbps_serdes[] = {
+ {0x, 0x0800, 0xff00},
+ {0x0060, 0x00041c5c,
On Thursday 15 May 2014 12:01:30 Murali Karicheri wrote:
> +static struct serdes_config ks_100mhz_pcie_5gbps_serdes[] = {
> + {0x, 0x0800, 0xff00},
> + {0x0060, 0x00041c5c, 0x00ff},
> + {0x0064, 0x0343c700, 0xff00},
> + {0x006c, 0x0012, 0x00ff},
This phy driver is used by keystone PCI driver. The hw vendor that
provides the phy hw published only registers and their values. So
this driver uses these hard coded values to initialize the phy.
CC: Grant Likely
CC: Rob Herring
CC: Mohit Kumar
CC: Jingoo Han
CC: Bjorn Helgaas
This phy driver is used by keystone PCI driver. The hw vendor that
provides the phy hw published only registers and their values. So
this driver uses these hard coded values to initialize the phy.
CC: Grant Likely grant.lik...@linaro.org
CC: Rob Herring robh...@kernel.org
CC: Mohit Kumar
On Thursday 15 May 2014 12:01:30 Murali Karicheri wrote:
+static struct serdes_config ks_100mhz_pcie_5gbps_serdes[] = {
+ {0x, 0x0800, 0xff00},
+ {0x0060, 0x00041c5c, 0x00ff},
+ {0x0064, 0x0343c700, 0xff00},
+ {0x006c, 0x0012, 0x00ff},
+
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