Re: [PATCH v1 4/7] mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well

2018-09-10 Thread Lee Jones
On Thu, 30 Aug 2018, Andy Shevchenko wrote: > Power button IRQ actually has a second level of interrupts to > distinguish between UI and POWER buttons. Moreover, current > implementation looks awkward in approach to handle second level IRQs by > first level related IRQ chip. > > To address above

Re: [PATCH v1 4/7] mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well

2018-09-10 Thread Lee Jones
On Thu, 30 Aug 2018, Andy Shevchenko wrote: > Power button IRQ actually has a second level of interrupts to > distinguish between UI and POWER buttons. Moreover, current > implementation looks awkward in approach to handle second level IRQs by > first level related IRQ chip. > > To address above

Re: [PATCH v1 4/7] mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well

2018-08-31 Thread Mika Westerberg
On Thu, Aug 30, 2018 at 07:52:52PM +0300, Andy Shevchenko wrote: > Power button IRQ actually has a second level of interrupts to > distinguish between UI and POWER buttons. Moreover, current > implementation looks awkward in approach to handle second level IRQs by > first level related IRQ chip. >

Re: [PATCH v1 4/7] mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well

2018-08-31 Thread Mika Westerberg
On Thu, Aug 30, 2018 at 07:52:52PM +0300, Andy Shevchenko wrote: > Power button IRQ actually has a second level of interrupts to > distinguish between UI and POWER buttons. Moreover, current > implementation looks awkward in approach to handle second level IRQs by > first level related IRQ chip. >

[PATCH v1 4/7] mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well

2018-08-30 Thread Andy Shevchenko
Power button IRQ actually has a second level of interrupts to distinguish between UI and POWER buttons. Moreover, current implementation looks awkward in approach to handle second level IRQs by first level related IRQ chip. To address above issues, split power button IRQ to be chained as well.

[PATCH v1 4/7] mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well

2018-08-30 Thread Andy Shevchenko
Power button IRQ actually has a second level of interrupts to distinguish between UI and POWER buttons. Moreover, current implementation looks awkward in approach to handle second level IRQs by first level related IRQ chip. To address above issues, split power button IRQ to be chained as well.