Re: [PATCH v1 5/5] xen/PMU: Cache MSR accesses during interrupt handling

On Tue, Sep 10, 2013 at 11:31:50AM -0400, Boris Ostrovsky wrote: > Avoid trapping to hypervisor on each MSR access during interrupt handling. > Instead, use cached MSR values provided in shared xenpmu_data by Xen. When > handling is completed, flush the registers to hypervisor who will load them >

[PATCH v1 5/5] xen/PMU: Cache MSR accesses during interrupt handling

Avoid trapping to hypervisor on each MSR access during interrupt handling. Instead, use cached MSR values provided in shared xenpmu_data by Xen. When handling is completed, flush the registers to hypervisor who will load them into HW. Signed-off-by: Boris Ostrovsky --- arch/x86/xen/pmu.c