Re: [PATCH v1 net-next 4/4] net: stmmac: setup higher frequency clk support for EHL & TGL

On 8/27/2019 3:38 AM, Voon, Weifeng wrote: +#include #include #include @@ -174,6 +175,19 @@ static int intel_mgbe_common_data(struct >> pci_dev *pdev, plat->axi->axi_blen[1] = 8; plat->axi->axi_blen[2] = 16; + plat->ptp_max_adj =

RE: [PATCH v1 net-next 4/4] net: stmmac: setup higher frequency clk support for EHL & TGL

> > > +#include > > > #include > > > #include > > > > > > @@ -174,6 +175,19 @@ static int intel_mgbe_common_data(struct > pci_dev *pdev, > > > plat->axi->axi_blen[1] = 8; > > > plat->axi->axi_blen[2] = 16; > > > > > > + plat->ptp_max_adj = plat->clk_ptp_rate; > > > + > > > + /* Set system

Re: [PATCH v1 net-next 4/4] net: stmmac: setup higher frequency clk support for EHL & TGL

On Mon, Aug 26, 2019 at 12:55:31PM -0700, Florian Fainelli wrote: > On 8/26/19 6:38 PM, Voon Weifeng wrote: > > EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk, > > ptp clock and ptp_max_adj to 200MHz. > > > > Signed-off-by: Voon Weifeng > > Signed-off-by: Ong Boon Leong > > ---

Re: [PATCH v1 net-next 4/4] net: stmmac: setup higher frequency clk support for EHL & TGL

On 8/26/19 6:38 PM, Voon Weifeng wrote: > EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk, > ptp clock and ptp_max_adj to 200MHz. > > Signed-off-by: Voon Weifeng > Signed-off-by: Ong Boon Leong > --- > drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 21 +

[PATCH v1 net-next 4/4] net: stmmac: setup higher frequency clk support for EHL & TGL

EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk, ptp clock and ptp_max_adj to 200MHz. Signed-off-by: Voon Weifeng Signed-off-by: Ong Boon Leong --- drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 21 + drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c | 3