On Mon, Feb 5, 2018 at 4:25 PM, John Garry wrote:
> On 05/02/2018 13:16, Andy Shevchenko wrote:
>> On Thu, Feb 1, 2018 at 1:32 PM, John Garry wrote:
>> resource_size_t is dynamic width type, you will see a compiler
>> warning. For this we have
>>
On Mon, Feb 5, 2018 at 4:25 PM, John Garry wrote:
> On 05/02/2018 13:16, Andy Shevchenko wrote:
>> On Thu, Feb 1, 2018 at 1:32 PM, John Garry wrote:
>> resource_size_t is dynamic width type, you will see a compiler
>> warning. For this we have
>> %pap specifier.
>>
>> Moreover, in some cases
On 05/02/2018 13:16, Andy Shevchenko wrote:
On Thu, Feb 1, 2018 at 1:32 PM, John Garry wrote:
Hi Andy,
I'm not going through all patch, by one thing I would like you to pay
attention on, i.e.
printing resource_size_t and struct resource
+
On 05/02/2018 13:16, Andy Shevchenko wrote:
On Thu, Feb 1, 2018 at 1:32 PM, John Garry wrote:
Hi Andy,
I'm not going through all patch, by one thing I would like you to pay
attention on, i.e.
printing resource_size_t and struct resource
+ dev_err(dev, "translate
On Thu, Feb 1, 2018 at 1:32 PM, John Garry wrote:
I'm not going through all patch, by one thing I would like you to pay
attention on, i.e.
printing resource_size_t and struct resource
>> + dev_err(dev, "translate bus-addr(0x%llx) fail!\n",
>> +
On Thu, Feb 1, 2018 at 1:32 PM, John Garry wrote:
I'm not going through all patch, by one thing I would like you to pay
attention on, i.e.
printing resource_size_t and struct resource
>> + dev_err(dev, "translate bus-addr(0x%llx) fail!\n",
>> +
On 05/02/2018 12:10, Joe Perches wrote:
On Mon, 2018-02-05 at 11:01 +, John Garry wrote:
On 04/02/2018 07:45, Rafael J. Wysocki wrote:
+ /* translate the I/O resources */
+ for (i = 0; i < count; i++) {
+ if (resources[i].flags & IORESOURCE_IO) {
+
On 05/02/2018 12:10, Joe Perches wrote:
On Mon, 2018-02-05 at 11:01 +, John Garry wrote:
On 04/02/2018 07:45, Rafael J. Wysocki wrote:
+ /* translate the I/O resources */
+ for (i = 0; i < count; i++) {
+ if (resources[i].flags & IORESOURCE_IO) {
+
On Mon, 2018-02-05 at 11:01 +, John Garry wrote:
> On 04/02/2018 07:45, Rafael J. Wysocki wrote:
> > + /* translate the I/O resources */
> > > + for (i = 0; i < count; i++) {
> > > + if (resources[i].flags & IORESOURCE_IO) {
> > > + ret =
On Mon, 2018-02-05 at 11:01 +, John Garry wrote:
> On 04/02/2018 07:45, Rafael J. Wysocki wrote:
> > + /* translate the I/O resources */
> > > + for (i = 0; i < count; i++) {
> > > + if (resources[i].flags & IORESOURCE_IO) {
> > > + ret =
On 04/02/2018 07:45, Rafael J. Wysocki wrote:
On Tue, Jan 23, 2018 at 5:36 PM, John Garry wrote:
On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access
I/O with some special host-local I/O ports known on x86. As their I/O space
are not memory mapped
On 04/02/2018 07:45, Rafael J. Wysocki wrote:
On Tue, Jan 23, 2018 at 5:36 PM, John Garry wrote:
On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access
I/O with some special host-local I/O ports known on x86. As their I/O space
are not memory mapped like PCI/PCIE MMIO host
On Tue, Jan 23, 2018 at 5:36 PM, John Garry wrote:
> On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access
> I/O with some special host-local I/O ports known on x86. As their I/O space
> are not memory mapped like PCI/PCIE MMIO host bridges, this patch
On Tue, Jan 23, 2018 at 5:36 PM, John Garry wrote:
> On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access
> I/O with some special host-local I/O ports known on x86. As their I/O space
> are not memory mapped like PCI/PCIE MMIO host bridges, this patch is meant
> to support a
On 23/01/2018 16:36, John Garry wrote:
On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access
I/O with some special host-local I/O ports known on x86. As their I/O space
are not memory mapped like PCI/PCIE MMIO host bridges, this patch is meant
to support a new class of I/O
On 23/01/2018 16:36, John Garry wrote:
On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access
I/O with some special host-local I/O ports known on x86. As their I/O space
are not memory mapped like PCI/PCIE MMIO host bridges, this patch is meant
to support a new class of I/O
On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access
I/O with some special host-local I/O ports known on x86. As their I/O space
are not memory mapped like PCI/PCIE MMIO host bridges, this patch is meant
to support a new class of I/O host controllers where the local IO ports
On some platforms(such as Hip06/Hip07), the legacy ISA/LPC devices access
I/O with some special host-local I/O ports known on x86. As their I/O space
are not memory mapped like PCI/PCIE MMIO host bridges, this patch is meant
to support a new class of I/O host controllers where the local IO ports
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