On Tue, Aug 28, 2018 at 12:21:40PM +0200, Borislav Petkov wrote:
> On Mon, Aug 27, 2018 at 09:53:24PM +0300, Jarkko Sakkinen wrote:
> > diff --git a/arch/x86/include/asm/cpufeatures.h
> > b/arch/x86/include/asm/cpufeatures.h
> > index 7bb647f57d42..4af60a0fdb20 100644
> > --- a/arch/x86/include/as
On Mon, Aug 27, 2018 at 09:53:24PM +0300, Jarkko Sakkinen wrote:
> diff --git a/arch/x86/include/asm/cpufeatures.h
> b/arch/x86/include/asm/cpufeatures.h
> index 7bb647f57d42..4af60a0fdb20 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -13,7 +13,7
On Mon, Aug 27, 2018 at 12:39:36PM -0700, Dave Hansen wrote:
> On 08/27/2018 11:53 AM, Jarkko Sakkinen wrote:
> > + /* Intel SGX features: level 0x0012 */
> > + if (c->cpuid_level >= 0x0012) {
> > + cpuid(0x0012, &eax, &ebx, &ecx, &edx);
> > +
> > + c->x86_capabi
On 08/27/2018 11:53 AM, Jarkko Sakkinen wrote:
> + /* Intel SGX features: level 0x0012 */
> + if (c->cpuid_level >= 0x0012) {
> + cpuid(0x0012, &eax, &ebx, &ecx, &edx);
> +
> + c->x86_capability[CPUID_12_EAX] = eax;
> + }
I've given this specific bit
From: Sean Christopherson
CPUID_12_EAX is an Intel-defined feature bits leaf dedicated for SGX.
There are currently four documented feature bits, with more expected in
the not-too-distant future.
Signed-off-by: Sean Christopherson
Signed-off-by: Jarkko Sakkinen
---
arch/x86/include/asm/cpufea
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