Re: [PATCH v13 1/9] LIB: Introduce a generic PIO mapping method

2018-02-14 Thread John Garry
On 13/02/2018 23:05, dann frazier wrote: bool > > +config INDIRECT_PIO > + bool "Access I/O in non-MMIO mode" > + depends on ARM64 > + help > +On some platforms where no separate I/O space exists, there are I/O > +hosts which can not be accessed in MMIO mode. Using the logical

Re: [PATCH v13 1/9] LIB: Introduce a generic PIO mapping method

2018-02-14 Thread John Garry
On 13/02/2018 23:05, dann frazier wrote: bool > > +config INDIRECT_PIO > + bool "Access I/O in non-MMIO mode" > + depends on ARM64 > + help > +On some platforms where no separate I/O space exists, there are I/O > +hosts which can not be accessed in MMIO mode. Using the logical

Re: [PATCH v13 1/9] LIB: Introduce a generic PIO mapping method

2018-02-13 Thread dann frazier
On Wed, Feb 14, 2018 at 01:45:25AM +0800, John Garry wrote: > From: Zhichang Yuan > > In commit 41f8bba7f555 ("of/pci: Add pci_register_io_range() and > pci_pio_to_address()"), a new I/O space management was supported. With > that driver, the I/O ranges configured for

Re: [PATCH v13 1/9] LIB: Introduce a generic PIO mapping method

2018-02-13 Thread dann frazier
On Wed, Feb 14, 2018 at 01:45:25AM +0800, John Garry wrote: > From: Zhichang Yuan > > In commit 41f8bba7f555 ("of/pci: Add pci_register_io_range() and > pci_pio_to_address()"), a new I/O space management was supported. With > that driver, the I/O ranges configured for PCI/PCIe hosts on some >

[PATCH v13 1/9] LIB: Introduce a generic PIO mapping method

2018-02-13 Thread John Garry
From: Zhichang Yuan In commit 41f8bba7f555 ("of/pci: Add pci_register_io_range() and pci_pio_to_address()"), a new I/O space management was supported. With that driver, the I/O ranges configured for PCI/PCIe hosts on some architectures can be mapped to logical PIO,

[PATCH v13 1/9] LIB: Introduce a generic PIO mapping method

2018-02-13 Thread John Garry
From: Zhichang Yuan In commit 41f8bba7f555 ("of/pci: Add pci_register_io_range() and pci_pio_to_address()"), a new I/O space management was supported. With that driver, the I/O ranges configured for PCI/PCIe hosts on some architectures can be mapped to logical PIO, converted easily between CPU