Re: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Borislav Petkov
On Tue, Oct 31, 2017 at 07:37:29PM +, Yu, Fenghua wrote: > Should we change the legacy names as well? User apps may use the names > already. Changing the names may break the apps. Yeah, we can't do that. > If we do make all uniform, do you prefer adding "_" after AVX512? Well, I think we

Re: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Borislav Petkov
On Tue, Oct 31, 2017 at 07:37:29PM +, Yu, Fenghua wrote: > Should we change the legacy names as well? User apps may use the names > already. Changing the names may break the apps. Yeah, we can't do that. > If we do make all uniform, do you prefer adding "_" after AVX512? Well, I think we

RE: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Yu, Fenghua
> On Tuesday, October 31, 2017 11:33 AM, Borislav Petkov wrote: > On Tue, Oct 31, 2017 at 06:25:55PM +, Yu, Fenghua wrote: > > We may need to send a patch to fix a few legacy names that don't match > > exactly specs, e.g. AVX512VBMI as you mentioned. > > Or we can make them all uniform and

RE: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Yu, Fenghua
> On Tuesday, October 31, 2017 11:33 AM, Borislav Petkov wrote: > On Tue, Oct 31, 2017 at 06:25:55PM +, Yu, Fenghua wrote: > > We may need to send a patch to fix a few legacy names that don't match > > exactly specs, e.g. AVX512VBMI as you mentioned. > > Or we can make them all uniform and

Re: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Borislav Petkov
On Tue, Oct 31, 2017 at 06:25:55PM +, Yu, Fenghua wrote: > We may need to send a patch to fix a few legacy names that don't match > exactly specs, e.g. AVX512VBMI as you mentioned. Or we can make them all uniform and ignore the spec. It's not like they would be harder to grep afterwards. --

Re: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Borislav Petkov
On Tue, Oct 31, 2017 at 06:25:55PM +, Yu, Fenghua wrote: > We may need to send a patch to fix a few legacy names that don't match > exactly specs, e.g. AVX512VBMI as you mentioned. Or we can make them all uniform and ignore the spec. It's not like they would be harder to grep afterwards. --

RE: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Yu, Fenghua
> On Tuesday, October 31, 2017 11:03 AM, Yu, Fenghua wrote > > On Tuesday, October 31, 2017 3:06 AM, Borislav Petkov wrote: > > On Mon, Oct 30, 2017 at 06:20:29PM -0700, Gayatri Kammela wrote: > > > #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit > > Manipulation instructions*/ >

RE: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Yu, Fenghua
> On Tuesday, October 31, 2017 11:03 AM, Yu, Fenghua wrote > > On Tuesday, October 31, 2017 3:06 AM, Borislav Petkov wrote: > > On Mon, Oct 30, 2017 at 06:20:29PM -0700, Gayatri Kammela wrote: > > > #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit > > Manipulation instructions*/ >

Re: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Borislav Petkov
On Tue, Oct 31, 2017 at 06:02:53PM +, Yu, Fenghua wrote: > As you said, the legacy code doesn't follow spec naming strictly > and the spec doesn't have uniform naming convention either. We are > contacting spec author to see if we can follow the same naming > convention in the future specs.

Re: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Borislav Petkov
On Tue, Oct 31, 2017 at 06:02:53PM +, Yu, Fenghua wrote: > As you said, the legacy code doesn't follow spec naming strictly > and the spec doesn't have uniform naming convention either. We are > contacting spec author to see if we can follow the same naming > convention in the future specs.

RE: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Yu, Fenghua
> On Tuesday, October 31, 2017 3:06 AM, Borislav Petkov wrote: > On Mon, Oct 30, 2017 at 06:20:29PM -0700, Gayatri Kammela wrote: > > #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit > Manipulation instructions*/ > > So we have previous AVX512 feature bits which do not separate

RE: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Yu, Fenghua
> On Tuesday, October 31, 2017 3:06 AM, Borislav Petkov wrote: > On Mon, Oct 30, 2017 at 06:20:29PM -0700, Gayatri Kammela wrote: > > #define X86_FEATURE_AVX512VBMI (16*32+ 1) /* AVX512 Vector Bit > Manipulation instructions*/ > > So we have previous AVX512 feature bits which do not separate

Re: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Borislav Petkov
On Mon, Oct 30, 2017 at 06:20:29PM -0700, Gayatri Kammela wrote: > Add a few new SSE/AVX/AVX512 instruction groups/features for enumeration > in /proc/cpuinfo: AVX512_VBMI2, GFNI, VAES, VPCLMULQDQ, AVX512_VNNI, > AVX512_BITALG. > > CPUID.(EAX=7,ECX=0):ECX[bit 6] AVX512_VBMI2 >

Re: [PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-31 Thread Borislav Petkov
On Mon, Oct 30, 2017 at 06:20:29PM -0700, Gayatri Kammela wrote: > Add a few new SSE/AVX/AVX512 instruction groups/features for enumeration > in /proc/cpuinfo: AVX512_VBMI2, GFNI, VAES, VPCLMULQDQ, AVX512_VNNI, > AVX512_BITALG. > > CPUID.(EAX=7,ECX=0):ECX[bit 6] AVX512_VBMI2 >

[PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-30 Thread Gayatri Kammela
Add a few new SSE/AVX/AVX512 instruction groups/features for enumeration in /proc/cpuinfo: AVX512_VBMI2, GFNI, VAES, VPCLMULQDQ, AVX512_VNNI, AVX512_BITALG. CPUID.(EAX=7,ECX=0):ECX[bit 6] AVX512_VBMI2 CPUID.(EAX=7,ECX=0):ECX[bit 8] GFNI CPUID.(EAX=7,ECX=0):ECX[bit 9] VAES

[PATCH v2] x86/cpufeatures: Enable new SSE/AVX/AVX512 cpu features

2017-10-30 Thread Gayatri Kammela
Add a few new SSE/AVX/AVX512 instruction groups/features for enumeration in /proc/cpuinfo: AVX512_VBMI2, GFNI, VAES, VPCLMULQDQ, AVX512_VNNI, AVX512_BITALG. CPUID.(EAX=7,ECX=0):ECX[bit 6] AVX512_VBMI2 CPUID.(EAX=7,ECX=0):ECX[bit 8] GFNI CPUID.(EAX=7,ECX=0):ECX[bit 9] VAES