Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hi Geert, Laurent > >> Yes, but compiled by 32bit too, right ? > >> Without this "ll", 32bit compiler say > >> > >> warning: this decimal constant is unsigned only in ISO C90 > > > > That's right. How about 409600UL then, to force unsigned integer types ? > > Or possibly even better,

Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hi Geert, Laurent > >> Yes, but compiled by 32bit too, right ? > >> Without this "ll", 32bit compiler say > >> > >> warning: this decimal constant is unsigned only in ISO C90 > > > > That's right. How about 409600UL then, to force unsigned integer types ? > > Or possibly even better,

Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hi Laurent, On Thu, Dec 14, 2017 at 9:17 AM, Laurent Pinchart wrote: > On Thursday, 14 December 2017 04:10:27 EET Kuninori Morimoto wrote: >> >> + if ((fvco < 2000) || >> >> + (fvco > 409600ll)) >> > >> > No need for

Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hi Laurent, On Thu, Dec 14, 2017 at 9:17 AM, Laurent Pinchart wrote: > On Thursday, 14 December 2017 04:10:27 EET Kuninori Morimoto wrote: >> >> + if ((fvco < 2000) || >> >> + (fvco > 409600ll)) >> > >> > No need for the inner parentheses, and you can

Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hi Morimoto-san, On Thursday, 14 December 2017 04:10:27 EET Kuninori Morimoto wrote: > Hi Laurent > > Thank you for your feedback > > >> + * NOTES > >> + * N = (n + 1), M = (m + 1), P = 2 > >> + * 2000 < fvco < 4096Mhz > > > > Are you sure that the fvco constraint is really

Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hi Morimoto-san, On Thursday, 14 December 2017 04:10:27 EET Kuninori Morimoto wrote: > Hi Laurent > > Thank you for your feedback > > >> + * NOTES > >> + * N = (n + 1), M = (m + 1), P = 2 > >> + * 2000 < fvco < 4096Mhz > > > > Are you sure that the fvco constraint is really

Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hi Laurent Thank you for your feedback > > +* NOTES > > +* N = (n + 1), M = (m + 1), P = 2 > > +* 2000 < fvco < 4096Mhz > > Are you sure that the fvco constraint is really 2kHz, and not 2GHz ? 2kHz - > 4GHz would be a surprisingly large range. It is 2kHz. This is came

Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hi Laurent Thank you for your feedback > > +* NOTES > > +* N = (n + 1), M = (m + 1), P = 2 > > +* 2000 < fvco < 4096Mhz > > Are you sure that the fvco constraint is really 2kHz, and not 2GHz ? 2kHz - > 4GHz would be a surprisingly large range. It is 2kHz. This is came

Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hello Morimoto-san, Thank you for the patch. On Wednesday, 6 December 2017 08:05:38 EET Kuninori Morimoto wrote: > From: Kuninori Morimoto > > In general, PLL has VCO (= Voltage controlled oscillator), > one of the very important electronic feature called as

Re: [PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

Hello Morimoto-san, Thank you for the patch. On Wednesday, 6 December 2017 08:05:38 EET Kuninori Morimoto wrote: > From: Kuninori Morimoto > > In general, PLL has VCO (= Voltage controlled oscillator), > one of the very important electronic feature called as "jitter" > is related to this VCO.

[PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

From: Kuninori Morimoto In general, PLL has VCO (= Voltage controlled oscillator), one of the very important electronic feature called as "jitter" is related to this VCO. In academic generalism, VCO should be maximum to be more small jitter. In high frequency

[PATCH v2] drm: rcar-du: calculate DPLLCR to be more small jitter

From: Kuninori Morimoto In general, PLL has VCO (= Voltage controlled oscillator), one of the very important electronic feature called as "jitter" is related to this VCO. In academic generalism, VCO should be maximum to be more small jitter. In high frequency clock, jitter will be large impact.